40G MACsec Encryption in an FPGA - Ethernet Technology Summit
40G MACsec Encryption in an FPGA - Ethernet Technology Summit
40G MACsec Encryption in an FPGA - Ethernet Technology Summit
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AES-GCM IP Core<br />
load_key<br />
<strong>in</strong>put_key<br />
load_text<br />
<strong>in</strong>put text<br />
<strong>in</strong>put_text_k<strong>in</strong>d<br />
<strong>in</strong>put_text_width<br />
<strong>in</strong>put_text_f<strong>in</strong>al<br />
Pipel<strong>in</strong>ed<br />
AES<br />
128 bit GF<br />
Multiply<br />
output_text_valid<br />
output text<br />
output_text_k<strong>in</strong>d<br />
output_text_width<br />
output_text_f<strong>in</strong>al<br />
output_tag_valid<br />
load_iv<br />
<strong>in</strong>put_iv_<strong>an</strong>d_tag<br />
GCM Mode Logic<br />
output_tag<br />
authentication success<br />
start<br />
pass_through<br />
do_encrypt<br />
output_pend<strong>in</strong>g<br />
adv<strong>an</strong>ced_output_valid<br />
io_cycle<br />
enable<br />
clock<br />
reset<br />
GCM-Control<br />
clear<br />
S<strong>an</strong> Jose, CA USA<br />
February 2012 9
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