40G MACsec Encryption in an FPGA - Ethernet Technology Summit
40G MACsec Encryption in an FPGA - Ethernet Technology Summit
40G MACsec Encryption in an FPGA - Ethernet Technology Summit
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AES-GCM<br />
• Critical part of MACSEC for area <strong>an</strong>d<br />
perform<strong>an</strong>ce<br />
• <strong>Encryption</strong> with AES-CTR mode <strong>an</strong>d<br />
authentication with GF-HASH<br />
• Works on 128 bit blocks of data where<br />
ethernet works on bytes<br />
• AES-CTR is iterative, 10 or 14 ‘rounds’ of<br />
process<strong>in</strong>g for each data block.<br />
• Two overhead encryptions per packet, one<br />
overhead GF-HASH operation per packet.<br />
S<strong>an</strong> Jose, CA USA<br />
February 2012 8
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