MASTER OF SCIENCE Integrated Circuit Design

Admissions Information
Intake
August each year. Semesters will run from August to December
and from January to May.
Requirements
Good bachelor degree in electrical / electronics engineering or
equivalent degree in other relevant disciplines. Preferably for
those who have at least 6 months of relevant working experience.
Students are required to demonstrate ability to master the
English language as per appropriate TOEFL/IELTS results.
Applications
Online via www.gist.edu.sg
Matriculation
Students are matriculated at the same time for the duration
of the three semester programme at TUM and NTU.
Tuition Fees
*SGD$32,000 is payable for the full course of 90 credits
which includes: Teaching fees, examination fees, free internet
access, laboratory expenses, costs of mandatory events e.g
seminars. Payment is divided into three equal instalments
(July, January, July).
Student’s Accommodation
In Singapore: Student hostels or private rooms.
In Germany: Provided by companies, Student Unions, student
hostels or private rooms.
NOTE
Travel and living expenses are NOT included. Living expenses
in Singapore are estimated at S$1000 per month (excluding
airfare). An estimated €700 per month (excluding airfare) is
required for the 2 months internship in Germany and/or
possibly the 6 months research work for the Master’s thesis if
done in a company/university in Germany. A living allowance
may be granted by the sponsor company for the duration of
internship/master thesis.
*Fees quoted are before 7% GST (Goods & Services Tax).
GIST - TUM Asia - Study the Global Way
The German Institute of Science and Technology - TUM Asia
(GIST - TUM Asia), a subsidiary of Technische Universität
München (TUM) in Singapore is the result of the first ever
German - Singaporean University partnership. Leveraging on
the strengths of world class universities, GIST - TUM Asia offers
academic programmes designed to groom the next generation
of entrepreneurs and leaders.
Your Lecturers
Study with some of the world’s best lecturers including Nobel
Laureates – this in addition to the President of TUM, and Deans
and Professors of TUM, and NTU. In contrast to the practice of
tele-teaching, GIST - TUM Asia engages all international lecturers
on an exclusive basis for the lecture period in Singapore assuring
you of direct contact with your instructors throughout the
duration of your programme.
Your Education
At GIST - TUM Asia you will be part of a unique joint degree
programme that runs over 18 months of scientific training,
practical research and cultural enrichment. Benefit from an
enriched curriculum including Marketing, Business Administration,
leadership training, legal aspects as well as European and
Asian History. With our cross-discipline modules we actively
support requirements of corporate need to overcome cultural
differences in business. On completion of the programme you
will be awarded a Master of Science degree jointly conferred by
TUM and NTU.
Your Career
Make early contact with potential employers during the course
of your studies – through lecturers from industry, internship
and master thesis opportunities at partnering companies. Our
close cooperation and partnership with corporate giants
ensures that they receive highly skilled and creative professionals
provided by us and you are assured of a leading role in the
global economy.
Contact
German Institute of Science and Technology - TUM Asia
10 Central Exchange Green
#03-01 Pixel Building
Singapore 138649
Tel: (+65) 6777-7407 / (+49) 894 161 774 28
Fax: (+65) 6777-7236
Email: info@gist.edu.sg
www.gist.edu.sg
Information are accurate at time of printing and subjected to further changes.
MASTER OF SCIENCE
Integrated Circuit Design
JOINT GERMAN - SINGAPOREAN DEGREE

Overview
GIST - TUM Asia’s Master of Science in Integrated Circuit Design
equips students with the academic proficiency and hands-on
knowledge required in the design, development and manufacture
of integrated circuit or integrated electrionic products. The
Master degree is jointly awarded by two of the world’s
reputable universities: Technische Universität München (TUM),
Nanyang Technological University.
Programme Structure and Duration
The Master of Science in Integrated Circuit Design is a full time
research and application focused programme that runs over 18
months (3 semesters). Students will complete 12 modules in
semester 1 and 2 in IC Design topics including 6 core modules
and 4 elective modules and 2 laboratory modules. Each technical
module has 45 contact hours. In addition, students will
take an English module of 80 hours and 5 other non-technical
short modules of 10 hours each. Students are also required to
complete a master thesis to be carried out for the full semester
3. The thesis may be undertaken either at NTU, TUM or in a
company.
Core Modules
• System-on-chip Solutions and Architecture
• Design Methodology and Automation
• Mixed Signal Circuit Design
• Digital IC Design
• Analog IC Design
• Digital Signal Processing
• Laboratory 1 : Analog IC Design
• Laboratory 2 : Digital IC Design
• Business and Technical English
*Elective Modules (Select 4)
• Design for Testability of VLSI
• Nanoelectronics
• Advanced MOSFETs and Novel Devices
• RF IC Design
• Simulation and Optimization of Analog Circuits
• Embedded Systems
• IC Packaging
*Subject to additions/modifications
Cross Discipline Modules (Compulsory)
• International Intellectual Property Law
• Selected Topics in Business and Adminstration
• Selected Topics in Management Methods
• Cultural, Social and Economic Aspects of Globalization
• Aspects of European and Asian History and Culture
Subject Contents
Core Modules
System on chip solutions and Architecture
Basics of CMOS integrated circuits from a system's perspective,
from MOSFET Transistor to realization of combinational /
sequential logic, Finite State Machines (FSM), SRAM, DRAM,
FLASH, FPGA, CPU core building blocks. Projection of IC
technology scaling and implementation alternative, Integrated
system solutions in inter-networking and communications:
SONET / SDH transport framers, Ethernet LAN/ATM SAN
switches, Control point processors and communication controllers,
network processers.
Design Methodology and Automation
Computer-aided design of analog and digital integrated
circuits. VLSI design flow. System level, algorithmic level,
register transfer level, logic level, circuit level. VLSI design
methods, high-level synthesis, logic synthesi, layout sysnthesis.
Analog and digital simulation, test design, formal verification.
Techniques from discrete mathematics and computer
science.
Mixed Signal Circuit Design
Fundamentals of discrete time signal processing. MOSFET as a
switch. Sample & hold circuits, switched capacitor circuits.
Data converter fundamentals. Nyquist rate D/A / AD converters.
Over sampling, noise shaping, A/D and D/A converters using
sigma-delts modulators. Switched capacitor filters.
Digital IC Design
Review of Integrated circuit fundamentals. Layout and design
issues. CMOS Digital Circuits. BiCMOS Digital Circuits. Sub
system design in digital circuits. Design methodologies.
Analog IC Design
Review of fundamentals. Analog building blocks. Switched
capacitor circuits. Current mode circuits. Continuous-time
filters. Data converters.
Digital Signal Processing
Introduction . Discrete-Fourier Transform (DFT) and Fast Fourier
Transform (FFT). Z Transform. Digital filters. Linear prediction
and optimum linear filters. Power spectrum estimation.
Elective Modules
Design for Testability of VLSI
Fault models and testability concepts. Test generation and fault
simulation algorithms. Introduction to testable design. Test
response compression. Shift-register polynomial division.
Pseudo-random sequence generators. Special purpose
shift-register circuits. Random pattern BIST. Built in boundary
scan structure. Limitaions and other concerns of random
pattern test. Test techniques for automatic test equipment.
Nanoelectronics
Low dimensional structures: quantum wells, quantum wires
and quantum dots. Electronic, optical, transport properties
of nanostructures. Quantum semiconductor devices. Fabrication
and charaterization techniques of nanatechnology.
Applications of nanostructures, nanodevices and nanosystems.
The bottom-up approach to nanotechnology: introduction
to molecular electronics and optoelectronics. Organic
materials for electronics: self – assembled monolayers;
conducting polymers;carbon nanotubes. Circuit implementations
and architectures for nanostructures; quantum cellular
automata and cellular non linear networks. Introduction to
quantum computing.
Advanced MOSFETs and Novel Devices
Historical development of mainstream MOSFETs until today:
economical, technological and physical fundamentals.
Properties of long channel and short channel MOSFETs. Hot
carrier effects, scaling rules, basic of charge carrier transport
(quantum-mechanical, hydro-dynamics, ballitics). Proposed
new MOSFET structures (vertical MOSFETs, double–gate,
fully-depleted MOSFETs). Hot-electron transistors, tunnelling
transisteors, lov-dimensional devices, singleelectrontransistor,
single-electron memories, quantumelectronics.
RF IC Design
System design considerations. CMOS RF components and
devices. Low-Noise Amplifier (LNA); Mixers; Voltage-
Controlled Oscillators (VCOs) RF power amplifiers. Phaselocked
loops and frequency synthesizers.
Simulation and Optimization of Analog Circuits
Analog simulation. AC (small-signal) simulation. DC
(operating point) simulation. TR (transient) simulation.
Large-signal models. Analog optimization. Design centering.
Probability calculus. Optimality conditions constrained/
unconstrained. Univariate optimization. Constrained optimization.
Sequential quadratic programming. Linear programming.
Statistical optimization.
Embedded Systems
Compositional Timing Analysis, Worst-Case Execution Time
(WCET) Analysis, Realtime Programming Language
(Esterel,Lustre), Microprocessor Architecture (RISC Vs DSP,
VLIW, SIMD, FPGAs), Software Platforms, Tools for Host-
Target-Development, Monitoring and Debugging,
Simulation& Design Space Exploration, RTOS and Scheduling
Policies, Processor Clock Rate, Benchmarking, Memory
Hierarchy (Cache)
IC Packaging
IC Packaging Overview, Electrical Packaging Design and
Thermal Management, Single Chip and Multichip Packaging,
IC Assembly, Sealing and Encapsulation, IC Packaging Failure
and Reliability, Microsystems Packaging and Applications.