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Military Communications and Information Technology: A Trusted ...

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Chapter 1: Concepts <strong>and</strong> Solutions for <strong>Communications</strong> <strong>and</strong> <strong>Information</strong> Systems<br />

79<br />

receiver R&S EM510/550. Currently final solution is developed on DSP/FPGA<br />

board which cooperates with wideb<strong>and</strong> fast tuning receiver.<br />

RCIED jamming system model will have one receiving (two b<strong>and</strong>) <strong>and</strong> one<br />

transmitting (three b<strong>and</strong>) antenna (Fig. 2). A receiving block is composed of two<br />

tuners intended for constant spectrum monitoring over multiple frequency b<strong>and</strong>.<br />

Tuners, with wide-b<strong>and</strong> IF filters <strong>and</strong> DSP/FPGA board perform discrimination <strong>and</strong><br />

identification of signals [1][9]. After detection, jamming is started on a frequency<br />

b<strong>and</strong>, where the trigger signal was detected. It is performed by the jammer block,<br />

consisted of three exciters (Fig. 3), amplifiers <strong>and</strong> two sets of collocation filters.<br />

Jamming signals are transmitted in frequency b<strong>and</strong>s: 20÷500 MHz, 500÷1000 MHz,<br />

1÷6 GHz, as a:<br />

• single tone sweep or narrowb<strong>and</strong> noise sweep;<br />

• narrowb<strong>and</strong> or wideb<strong>and</strong> barrage noise;<br />

• prepared signals from a controller’s memory.<br />

Figure 2. Scheme of reconnaissance-jamming system model<br />

Figure 3. Scheme of exciter (jammer) model

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