PIC12F683 Data Sheet - Microchip

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PIC12F683 NOTES: DS41211D-page 60 © 2007 Microchip Technology Inc.
PIC12F683 9.0 ANALOG-TO-DIGITAL CONVERTER (ADC) MODULE The Analog-to-Digital Converter (ADC) allows conversion of an analog input signal to a 10-bit binary representation of that signal. This device uses analog inputs, which are multiplexed into a single sample and hold circuit. The output of the sample and hold is connected to the input of the converter. The converter generates a 10-bit binary result via successive approximation and stores the conversion result into the ADC result registers (ADRESL and ADRESH). The ADC voltage reference is software selectable to either VDD or a voltage applied to the external reference pins. The ADC can generate an interrupt upon completion of a conversion. This interrupt can be used to wake-up the device from Sleep. Figure 9-1 shows the block diagram of the ADC. FIGURE 9-1: ADC BLOCK DIAGRAM VDD VCFG = 0 VREF VCFG = 1 GP0/AN0 GP1/AN1/VREF GP2/AN2 GP4/AN3 GO/DONE A/D 10 CHS ADON ADFM 0 = Left Justify 1 = Right Justify 10 ADRESH ADRESL 9.1 ADC Configuration When configuring and using the ADC the following functions must be considered: • GPIO configuration • Channel selection • ADC voltage reference selection • ADC conversion clock source • Interrupt control • Results formatting 9.1.2 CHANNEL SELECTION The CHS bits of the ADCON0 register determine which channel is connected to the sample and hold circuit. When changing channels, a delay is required before starting the next conversion. Refer to Section 9.2 “ADC Operation” for more information. 9.1.1 GPIO CONFIGURATION The ADC can be used to convert both analog and digital signals. When converting analog signals, the I/O pin should be configured for analog by setting the associated TRIS and ANSEL bits. See the corresponding GPIO section for more information. Note: Analog voltages on any pin that is defined as a digital input may cause the input buffer to conduct excess current. © 2007 Microchip Technology Inc. DS41211D-page 61
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PIC12F683 Data Sheet 8-Pin Flash-Ba
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PIC12F683 8-Pin Flash-Based, 8-Bit
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PIC12F683 Table of Contents 1.0 Dev
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PIC12F683 2.0 DEVICE OVERVIEW The P
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PIC12F683 3.0 MEMORY ORGANIZATION 3
Page 11 and 12: PIC12F683 TABLE 3-1: PIC12F683 SPEC
Page 13 and 14: PIC12F683 3.2.2.1 STATUS Register T
Page 15 and 16: PIC12F683 3.2.2.3 INTCON Register T
Page 17 and 18: PIC12F683 3.2.2.5 PIR1 Register The
Page 19 and 20: PIC12F683 3.3 PCL and PCLATH The Pr
Page 21 and 22: PIC12F683 3.0 OSCILLATOR MODULE (WI
Page 23 and 24: PIC12F683 3.3 Clock Source Modes Cl
Page 25 and 26: PIC12F683 3.4.4 EXTERNAL RC MODES T
Page 27 and 28: PIC12F683 3.5.3 LFINTOSC The Low-Fr
Page 29 and 30: PIC12F683 3.6 Clock Switching The s
Page 31 and 32: PIC12F683 3.8 Fail-Safe Clock Monit
Page 33 and 34: PIC12F683 4.0 GPIO PORT There are a
Page 35 and 36: PIC12F683 REGISTER 4-3: ANSEL: ANAL
Page 37 and 38: PIC12F683 4.2.4 ULTRA LOW-POWER WAK
Page 39 and 40: PIC12F683 4.2.5.2 GP1/AN1/CIN-/VREF
Page 41 and 42: PIC12F683 4.2.5.6 GP5/T1CKI/OSC1/CL
Page 43 and 44: PIC12F683 5.0 TIMER0 MODULE The Tim
Page 45 and 46: PIC12F683 REGISTER 5-1: OPTION_REG:
Page 47 and 48: PIC12F683 6.2.1 INTERNAL CLOCK SOUR
Page 49 and 50: PIC12F683 6.11 Timer1 Control Regis
Page 51 and 52: PIC12F683 7.0 TIMER2 MODULE The Tim
Page 53 and 54: PIC12F683 8.0 COMPARATOR MODULE FIG
Page 55 and 56: PIC12F683 8.3 Comparator Configurat
Page 57 and 58: PIC12F683 8.6 Comparator Interrupt
Page 59 and 60: PIC12F683 8.9 Comparator Gating Tim
Page 61: PIC12F683 FIGURE 8-7: COMPARATOR VO
Page 65 and 66: PIC12F683 9.1.5 INTERRUPTS The ADC
Page 67 and 68: PIC12F683 REGISTER 9-1: ADCON0: A/D
Page 69 and 70: PIC12F683 9.3 A/D Acquisition Requi
Page 71 and 72: PIC12F683 TABLE 9-2: SUMMARY OF ASS
Page 73 and 74: PIC12F683 10.0 DATA EEPROM MEMORY T
Page 75 and 76: PIC12F683 10.2 Reading the EEPROM D
Page 77 and 78: PIC12F683 11.0 CAPTURE/COMPARE/PWM
Page 79 and 80: PIC12F683 11.2 Compare Mode In Comp
Page 81 and 82: PIC12F683 11.3.1 PWM PERIOD The PWM
Page 83 and 84: PIC12F683 TABLE 11-4: TABLE 11-5: R
Page 85 and 86: PIC12F683 12.0 SPECIAL FEATURES OF
Page 87 and 88: PIC12F683 12.2 Calibration Bits Bro
Page 89 and 90: PIC12F683 12.3.4 BROWN-OUT RESET (B
Page 91 and 92: PIC12F683 FIGURE 12-4: TIME-OUT SEQ
Page 93 and 94: PIC12F683 TABLE 12-4: INITIALIZATIO
Page 95 and 96: PIC12F683 12.4.2 TIMER0 INTERRUPT A
Page 97 and 98: PIC12F683 12.5 Context Saving Durin
Page 99 and 100: PIC12F683 REGISTER 12-2: WDTCON: WA
Page 101 and 102: PIC12F683 FIGURE 12-10: WAKE-UP FRO
Page 103 and 104: PIC12F683 13.0 INSTRUCTION SET SUMM
Page 105 and 106: PIC12F683 13.2 Instruction Descript
Page 107 and 108: PIC12F683 DECFSZ Decrement f, Skip
Page 109 and 110: PIC12F683 RETFIE Return from Interr
Page 111 and 112: PIC12F683 SUBWF Subtract W from f S
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PIC12F683 14.0 DEVELOPMENT SUPPORT
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PIC12F683 14.7 MPLAB ICE 2000 High-
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PIC12F683 15.0 ELECTRICAL SPECIFICA
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PIC12F683 15.1 DC Characteristics:
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PIC12F683 15.6 Thermal Consideratio
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PIC12F683 15.8 AC Characteristics:
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PIC12F683 FIGURE 15-5: CLKOUT AND I
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PIC12F683 TABLE 15-4: RESET, WATCHD
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PIC12F683 FIGURE 15-9: CAPTURE/COMP
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PIC12F683 TABLE 15-9: PIC12F683 A/D
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PIC12F683 FIGURE 15-10: PIC12F683 A
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PIC12F683 16.0 DC AND AC CHARACTERI
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PIC12F683 FIGURE 16-4: 5.0 MAXIMUM
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PIC12F683 FIGURE 16-8: MAXIMUM IDD
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PIC12F683 FIGURE 16-12: MAXIMUM IDD
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PIC12F683 FIGURE 16-16: BOR IPD vs.
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PIC12F683 FIGURE 16-20: WDT PERIOD
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PIC12F683 FIGURE 16-24: VOL vs. IOL
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PIC12F683 FIGURE 16-28: SCHMITT TRI
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PIC12F683 FIGURE 16-32: LFINTOSC FR
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PIC12F683 FIGURE 16-36: MINIMUM HFI
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PIC12F683 FIGURE 16-40: TYPICAL HFI
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PIC12F683 17.0 PACKAGING INFORMATIO
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PIC12F683 8-Lead Plastic Small Outl
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PIC12F683 8-Lead Plastic Dual Flat,
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PIC12F683 APPENDIX A: Revision A Th
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PIC12F683 INDEX A A/D Specification
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PIC12F683 SUBLW ...................
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PIC12F683 THE MICROCHIP WEB SITE Mi
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PIC12F683 PRODUCT IDENTIFICATION SY
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PIC12F683 Data Sheet - Microchip

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