PIC12F683 Data Sheet - Microchip
PIC12F683 Data Sheet - Microchip PIC12F683 Data Sheet - Microchip
PIC12F683 TABLE 15-2: OSCILLATOR PARAMETERS Standard Operating Conditions (unless otherwise stated) Operating Temperature -40°C ≤ TA ≤ +125°C Param No. Sym Characteristic Freq. Tolerance Min Typ† Max Units Conditions — — — 2 TOSC Slowest clock — 21 — ms LFINTOSC/64 ±1% 7.92 8.0 8.08 MHz VDD = 3.5V, 25°C OS06 TWARM Internal Oscillator Switch when running (3) OS07 TSC Fail-Safe Sample Clock Period (1) — OS08 HFOSC Internal Calibrated HFINTOSC Frequency (2) ±2% 7.84 8.0 8.16 MHz 2.5V ≤ VDD ≤ 5.5V, 0°C ≤ TA ≤ +85°C ±5% 7.60 8.0 8.40 MHz 2.0V ≤ VDD ≤ 5.5V, -40°C ≤ TA ≤ +85°C (Ind.), -40°C ≤ TA ≤ +125°C (Ext.) OS09* LFOSC Internal Uncalibrated — 15 31 45 kHz LFINTOSC Frequency OS10* TIOSC HFINTOSC Oscillator — 5.5 12 24 μs VDD = 2.0V, -40°C to +85°C ST Wake-up from Sleep — 3.5 7 14 μs VDD = 3.0V, -40°C to +85°C Start-up Time — 3 6 11 μs VDD = 5.0V, -40°C to +85°C * These parameters are characterized but not tested. † Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: Instruction cycle period (TCY) equals four times the input oscillator time base period. All specified values are based on characterization data for that particular oscillator type under standard operating conditions with the device executing code. Exceeding these specified limits may result in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested to operate at “min” values with an external clock applied to the OSC1 pin. When an external clock input is used, the “max” cycle time limit is “DC” (no clock) for all devices. 2: To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 μF and 0.01 μF values in parallel are recommended. 3: By design. DS41211D-page 126 © 2007 Microchip Technology Inc.
PIC12F683 FIGURE 15-5: CLKOUT AND I/O TIMING Cycle Write Fetch Read Execute Q4 Q1 Q2 Q3 Fosc OS11 OS12 CLKOUT OS20 OS21 OS19 OS13 OS17 OS16 OS18 I/O pin (Input) OS15 OS14 I/O pin (Output) Old Value New Value OS18, OS19 TABLE 15-3: CLKOUT AND I/O TIMING PARAMETERS Standard Operating Conditions (unless otherwise stated) Operating Temperature -40°C ≤ TA ≤ +125°C Param No. Sym Characteristic Min Typ† Max Units Conditions OS11 TOSH2CKL FOSC↑ to CLKOUT↓ (1) — — 70 ns VDD = 5.0V OS12 TOSH2CKH FOSC↑ to CLKOUT↑ (1) — — 72 ns VDD = 5.0V OS13 TCKL2IOV CLKOUT↓ to Port out valid (1) — — 20 ns OS14 TIOV2CKH Port input valid before CLKOUT↑ (1) TOSC + 200 ns — — ns OS15* TOSH2IOV FOSC↑ (Q1 cycle) to Port out valid — 50 70 ns VDD = 5.0V OS16 TOSH2IOI FOSC↑ (Q2 cycle) to Port input invalid 50 — — ns VDD = 5.0V (I/O in hold time) OS17 TIOV2OSH Port input valid to FOSC↑ (Q2 cycle) (I/O in setup time) 20 — — ns OS18 TIOR Port output rise time (2) — — OS19 TIOF Port output fall time (2) — — OS20* TINP INT pin input high or low time 25 — — ns OS21* TGPP GPIO interrupt-on-change new input TCY — — ns level time * These parameters are characterized but not tested. † Data in “Typ” column is at 5.0V, 25°C unless otherwise stated. Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x TOSC. 2: Includes OSC2 in CLKOUT mode. 15 40 28 15 72 32 55 30 ns VDD = 2.0V VDD = 5.0V ns VDD = 2.0V VDD = 5.0V © 2007 Microchip Technology Inc. DS41211D-page 127
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- Page 79 and 80: PIC12F683 11.2 Compare Mode In Comp
- Page 81 and 82: PIC12F683 11.3.1 PWM PERIOD The PWM
- Page 83 and 84: PIC12F683 TABLE 11-4: TABLE 11-5: R
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- Page 87 and 88: PIC12F683 12.2 Calibration Bits Bro
- Page 89 and 90: PIC12F683 12.3.4 BROWN-OUT RESET (B
- Page 91 and 92: PIC12F683 FIGURE 12-4: TIME-OUT SEQ
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- Page 99 and 100: PIC12F683 REGISTER 12-2: WDTCON: WA
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- Page 103 and 104: PIC12F683 13.0 INSTRUCTION SET SUMM
- Page 105 and 106: PIC12F683 13.2 Instruction Descript
- Page 107 and 108: PIC12F683 DECFSZ Decrement f, Skip
- Page 109 and 110: PIC12F683 RETFIE Return from Interr
- Page 111 and 112: PIC12F683 SUBWF Subtract W from f S
- Page 113 and 114: PIC12F683 14.0 DEVELOPMENT SUPPORT
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- Page 117 and 118: PIC12F683 15.0 ELECTRICAL SPECIFICA
- Page 119 and 120: PIC12F683 15.1 DC Characteristics:
- Page 121 and 122: PIC12F683 15.3 DC Characteristics:
- Page 123 and 124: PIC12F683 15.5 DC Characteristics:
- Page 125 and 126: PIC12F683 15.6 Thermal Consideratio
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- Page 131 and 132: PIC12F683 TABLE 15-4: RESET, WATCHD
- Page 133 and 134: PIC12F683 FIGURE 15-9: CAPTURE/COMP
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- Page 145 and 146: PIC12F683 FIGURE 16-12: MAXIMUM IDD
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- Page 149 and 150: PIC12F683 FIGURE 16-20: WDT PERIOD
- Page 151 and 152: PIC12F683 FIGURE 16-24: VOL vs. IOL
- Page 153 and 154: PIC12F683 FIGURE 16-28: SCHMITT TRI
- Page 155 and 156: PIC12F683 FIGURE 16-32: LFINTOSC FR
- Page 157 and 158: PIC12F683 FIGURE 16-36: MINIMUM HFI
- Page 159 and 160: PIC12F683 FIGURE 16-40: TYPICAL HFI
- Page 161 and 162: PIC12F683 17.0 PACKAGING INFORMATIO
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- Page 167 and 168: PIC12F683 APPENDIX A: Revision A Th
- Page 169 and 170: PIC12F683 INDEX A A/D Specification
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- Page 175 and 176: PIC12F683 PRODUCT IDENTIFICATION SY
<strong>PIC12F683</strong><br />
FIGURE 15-5:<br />
CLKOUT AND I/O TIMING<br />
Cycle<br />
Write Fetch Read Execute<br />
Q4 Q1 Q2 Q3<br />
Fosc<br />
OS11<br />
OS12<br />
CLKOUT<br />
OS20<br />
OS21<br />
OS19<br />
OS13<br />
OS17<br />
OS16<br />
OS18<br />
I/O pin<br />
(Input)<br />
OS15<br />
OS14<br />
I/O pin<br />
(Output)<br />
Old Value<br />
New Value<br />
OS18, OS19<br />
TABLE 15-3:<br />
CLKOUT AND I/O TIMING PARAMETERS<br />
Standard Operating Conditions (unless otherwise stated)<br />
Operating Temperature -40°C ≤ TA ≤ +125°C<br />
Param<br />
No.<br />
Sym Characteristic Min Typ† Max Units Conditions<br />
OS11 TOSH2CKL FOSC↑ to CLKOUT↓ (1) — — 70 ns VDD = 5.0V<br />
OS12 TOSH2CKH FOSC↑ to CLKOUT↑ (1) — — 72 ns VDD = 5.0V<br />
OS13 TCKL2IOV CLKOUT↓ to Port out valid (1) — — 20 ns<br />
OS14 TIOV2CKH Port input valid before CLKOUT↑ (1) TOSC + 200 ns — — ns<br />
OS15* TOSH2IOV FOSC↑ (Q1 cycle) to Port out valid — 50 70 ns VDD = 5.0V<br />
OS16 TOSH2IOI FOSC↑ (Q2 cycle) to Port input invalid 50 — — ns VDD = 5.0V<br />
(I/O in hold time)<br />
OS17 TIOV2OSH Port input valid to FOSC↑ (Q2 cycle)<br />
(I/O in setup time)<br />
20 — — ns<br />
OS18 TIOR Port output rise time (2) —<br />
—<br />
OS19 TIOF Port output fall time (2) —<br />
—<br />
OS20* TINP INT pin input high or low time 25 — — ns<br />
OS21* TGPP GPIO interrupt-on-change new input TCY — — ns<br />
level time<br />
* These parameters are characterized but not tested.<br />
† <strong>Data</strong> in “Typ” column is at 5.0V, 25°C unless otherwise stated.<br />
Note 1: Measurements are taken in RC mode where CLKOUT output is 4 x TOSC.<br />
2: Includes OSC2 in CLKOUT mode.<br />
15<br />
40<br />
28<br />
15<br />
72<br />
32<br />
55<br />
30<br />
ns VDD = 2.0V<br />
VDD = 5.0V<br />
ns VDD = 2.0V<br />
VDD = 5.0V<br />
© 2007 <strong>Microchip</strong> Technology Inc. DS41211D-page 127
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