2nd Annual c-Si PVMC Workshop Report
2nd Annual c-Si PVMC Workshop Report
2nd Annual c-Si PVMC Workshop Report
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U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> - 2013<br />
U.S. <strong>PVMC</strong> <strong>Report</strong><br />
2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> –<br />
San Francisco, CA<br />
H.P. Seigneur, K.O. Davis, A.C. Rudack, W.V. Schoenfeld<br />
July 10 th , 2013
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> Summary - 2013<br />
Summary<br />
On July 10 th , 2013 the U.S. Photovoltaic Manufacturing Consortium (U.S. <strong>PVMC</strong>) held our 2 nd<br />
<strong>Annual</strong> c-<strong>Si</strong> <strong>Workshop</strong> in San Francisco, CA during the Intersolar NA conference. The<br />
general purpose of this workshop is identify critical industry challenges and needs, which<br />
is the first step in the process of establishing collaborative projects in c-<strong>Si</strong> programs at the<br />
<strong>PVMC</strong> and thus enabling the development new c-<strong>Si</strong> technologies.<br />
Our 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>Workshop</strong> was organized into two sessions, a morning session focusing<br />
on current manufacturing challenges and an afternoon session focusing on barriers to<br />
mainstream manufacturing for emerging c-<strong>Si</strong> technologies. Both morning and afternoon<br />
sessions consisted of presentations on needs, challenges, and trends in the areas of<br />
feedstock, wafering, and metrology within they own respective focus.<br />
Because our annual c-<strong>Si</strong> PVMV <strong>Workshop</strong>s are intended to stimulate and foster open<br />
discussion, we use a panel discussion with PV manufacturers during the morning session<br />
and an open discussion during the afternoon session to further expound on identified<br />
challenges and understand their associations with near and long-term needs in the<br />
industry.
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> - 2013<br />
Participants<br />
First Name Last Name Email Address Affiliation<br />
Brent Ames Brent_Ames@amat.com Applied Materials<br />
Stephen Gould stephen.gould@anu.edu.au Australian National University<br />
Marcie Black marcie@bandgap.com Bandgap Engineering<br />
Michael Jura mike@bandgap.com Bandgap Engineering<br />
Patrick Looney jlooney@bnl.gov Brookhaven National Laboratory<br />
KV Ravi kvravi510@gmail.com Consultant<br />
Doug Hall drdouglaswhall@gmail.com DOE<br />
Neelkanth Dhere dhere@fsec.ucf.edu Florida Solar Energy Center<br />
Andrew Gabor andrew@gaborpv.com Gabor Photovoltaics Consulting<br />
<strong>Si</strong>meon Baker-Finch simeon.baker-finch@hanwhasolar.us Hanwha Solar America<br />
Bidhan Chaudhuri bidhanpc@yahoo.com Hanwha Solar America<br />
Emmanuel Van<br />
evk@hanwhasolar.us<br />
Hanwha Solar America<br />
Kerschaver<br />
Abraham Michelen a.michelen@hvcc.edu HVCC<br />
Michael Woodhouse michael.woodhouse@nrel.gov NREL<br />
Anthony Broomer tbroomer@verizon.net Process Research<br />
Kris Davis Kris.Davis@uspvmc.org <strong>PVMC</strong><br />
Andrew Rudack andy.rudack@uspvmc.org <strong>PVMC</strong><br />
Winston Schoenfeld Winston.Schoenfeld@uspvmc.org <strong>PVMC</strong><br />
Hubert Seigneur hubert.seigneur@uspvmc.org <strong>PVMC</strong><br />
Ramesh Gopalan ramesh.gopalan@roshan-energy.com Roshan Energy<br />
dan holladay Dan.Holladay@sematech.org SEMATECH<br />
Stephan Raithel sraithel@semi.org SEMI<br />
Ron <strong>Si</strong>nton ron@sintoninstruments.com <strong>Si</strong>nton Instruments<br />
Stella Su ssu@solarbuyer.com SolarBuyer LLC<br />
Kristina Loge kloge@solarbuyer.com SolarBuyer LLC<br />
homi fatemi homi.fatemi@solexel.com Solexel<br />
Steve Hogan shogan@spirecorp.com Spire<br />
John Benner jpbenner@stanford.edu Stanford University<br />
Ethan Good ethan.good@sunedison.com SunEdison<br />
Atul Gupta agupta@suniva.com Suniva<br />
Greg Horner ghorner@tauscience.com Tau Science Corporation<br />
Sergei Ostapenko sergei.ostapenko@ultrasonictech.com Ultrasonic Technologies
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> Summary - 2013<br />
<strong>Workshop</strong> Agenda 1<br />
8:00a – 8:50a Registration/Breakfast<br />
8:50a – 9:00a Opening Remarks – Winston Schoenfeld, c-<strong>Si</strong> U.S.<strong>PVMC</strong><br />
Session 1: Current Needs and Challenges for PV Manufacturers<br />
9:00a – 9:30a SunEdison – Ethan Good<br />
9:30a – 10:00a Suniva – Atul Gupta<br />
10:00a – 10:30a GTM Research – Andrew Gabor<br />
10:30a – 10:45a Coffee Break/Networking<br />
10:45a – 11:15a SEMI – Stephan Raithel<br />
11:15a – 11:45a Solexel – Homi Fatemi<br />
11:45a – 12:15p Panel Discussion on PV Manufacturing Challenges<br />
12:15a – 1:15p Lunch/Networking<br />
Session 2: Emerging c-<strong>Si</strong> Technologies – Barriers to Mainstream<br />
Manufacturing<br />
1:15p – 1:40p Consultant – KV Ravi<br />
1:40p – 2:00p Florida Solar Energy Center – Kris Davis<br />
2:00p – 2:00p Bay Area PV Consortium – John Benner<br />
2:20p – 2:40p Applied Materials – Brent Ames<br />
2:40p – 2:50p Coffee Break/Networking<br />
2:50p – 3:10p Hanwha - <strong>Si</strong>meon Baker-Finch<br />
3:10p – 3:30p Australia National University – Stephen Gould<br />
3:30p – 3:50p Bandgap Engineering – Marcie Black<br />
3:50a – 4:10p National Renewable Energy Laboratory – Michael Woodhouse<br />
4:10p – 4:40p Open Discussion<br />
4:40p – 4:45p Wrap-up / Adjourn<br />
1To download the 2013 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> materials, refer to the following link:<br />
http://www.uspvmc.org/event_archives.html
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> - 2013<br />
Summary of Challenges<br />
This section summarizes both near-term and long-term challenges. Although our initial c-<strong>Si</strong><br />
programs focus on feedstock, wafering, and metrology, the summary of challenges includes<br />
challenges not directly associated to these production areas and are classified as others. Also, the<br />
summary tables were generated from the additional slides on challenges requested from each<br />
speaker.<br />
Near-Term Challenges (1-3 Years)<br />
Metrology Feedstock/Wafering Others<br />
Universal IV testing for solar cells<br />
Low-Cost, High-Purity, Flowable<br />
Feedstocks to Further Improve Minority<br />
Carrier Lifetime of Substrates<br />
Full wafer characterization<br />
Mitigating LID in pType Substrates and/or<br />
Migration to nType Substrates for<br />
Industrial Architectures<br />
100% EL/PL inspection of modules Low Thermal Budget Fabrication<br />
Sequences and/or Engineered Oxygen<br />
Defects<br />
Reflectivity measurements, Cell IV testing, Eliminate LID for p-type mono<br />
and Module IV Testing should simulate inlaminate<br />
conditions and field conditions<br />
Wafer Handling, Optical Confinement and<br />
Passivation at Thicknesses < 120 um<br />
Cosmetics/Quality specs<br />
Optimized matching of cells during<br />
stringing/assembly<br />
Interconnect ribbon reliability<br />
Cell IV testers that can contact fingers Inherently crack-resistant wafers/cells Cell-sorter binning algorithms. Take into<br />
account performance at nonstandard<br />
conditions<br />
A fast, accurate approach for<br />
characterizing surface recombination<br />
velocity. This becomes particularly<br />
important as wafer thickness is reduced<br />
A reliable method for differentiating bulk<br />
recombination from surface<br />
recombination<br />
Method for characterizing light trapping<br />
effectiveness for various approaches to<br />
light trapping<br />
Mechanical property characterization of<br />
thin wafers – fracture strength, time<br />
induced crack propagation, etc<br />
Improving methods of turning data into<br />
useful information<br />
Better methods of quantifying light<br />
trapping enhancements (not the same<br />
thing as reflectance)<br />
Decoupling surface and bulk<br />
recombination<br />
Correlating stress/strain to cracks<br />
Further reduction in process costs for<br />
poly-<strong>Si</strong><br />
Epitaxial Wafers – Reactors (Scaling,<br />
capacity, and maintenance)<br />
Epitaxial Wafers – Reusable substrate<br />
(supply line issue and increase reuse)<br />
Epitaxial Wafers – Consumables use,<br />
energy use, cost, availability<br />
Scaling up of n-type wafer production<br />
Improving diamond wire saw technology<br />
to enable thinner and thinner wafers<br />
Recycling of kerf fines<br />
Creation and optimization of wafering<br />
baselines to drive cell efficiency and yield<br />
improvements<br />
Cell-to-module conversion w/o power loss<br />
Throughput increase (front-end & backend)<br />
Efficiency increase with existing lines /<br />
technologies<br />
<strong>Si</strong>lver reduction / plating technologies<br />
Reliability of 50um thick epi-<strong>Si</strong> solar cells<br />
Lack of capital investment<br />
Cell and module reliability<br />
Creation and optimization of cell<br />
manufacturing baselines to drive cell<br />
efficiency and yield improvements<br />
Surface recombination metrology and<br />
mechanisms<br />
Making and handling of thin (
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> Summary - 2013<br />
Long-Term Challenges (4+ Years)<br />
Integrated tool level SPC<br />
Metrology Feedstock/Wafering Others<br />
Defect characterization and root cause<br />
analysis<br />
Controlling Growth Front in Direct Wafer<br />
Formation Approaches<br />
Closed-Loop Waste <strong>Si</strong> Recycling<br />
Wafer Preparation, Handling, Optical<br />
Confinement and Passivation at<br />
Thicknesses < 80 um<br />
Improving Spectral Harvesting (Down<br />
Conversion, Hetero/Tandem Structures)<br />
to Push c-<strong>Si</strong> Beyond S.Q. Limits<br />
Warranty rating for each module<br />
Materials qualifications<br />
Rectangular wafers and updated<br />
tooling/process/handling equipment<br />
Accelerated reliability testing Wafer thickness reduction New performance metrics on specs sheets.<br />
Predict kWh/yr for a few different<br />
standardized locations and install<br />
conditions<br />
Quantifying recombination in novel<br />
wafer/cell formats<br />
Low cost methods of characterizing bulk<br />
and surface impurities/contaminants<br />
Predicting reliability/durability issues<br />
upstream by integrating metrology data<br />
with predictive models<br />
Measuring thin silicon quality<br />
Implementation of new sawing<br />
technologies<br />
Further reduction in process costs for<br />
poly-<strong>Si</strong><br />
Adoption of lower cost and lower energy<br />
consumption synthesis routes for<br />
polysilicon<br />
Faster ways to validate new feedstock and<br />
wafering technologies to investors in<br />
terms of performance, reliability, etc.<br />
Glass-glass / frameless<br />
<strong>Si</strong>lver replacement (printing vs. Plating)<br />
Automation & cell-to-module integration<br />
Cell and module process integration for<br />
thin kerfless wafers<br />
Light trapping, low reflection without<br />
consumption of <strong>Si</strong><br />
Texturing of kerfless wafers<br />
Thin silicon – handling issues, specialized<br />
tools
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> - 2013<br />
Session 1: Panel Discussion<br />
The following section provides an overview of the panel discussion that covered four<br />
topical areas: (1) Thin wafers, (2) Metrology, (3) Mono-like, and (4) Concerns about c-<strong>Si</strong> PV.<br />
Before these topics were covered, the following question was asked: What is the best<br />
shape of a wafer/cell (pseudo square, square, rectangular) To get a square shape,<br />
225mm diameter is needed. Larger ingots in case of continuous Cz or n-type (Fz) comes at<br />
a cost. There are re-melt issues (cropping large amount of materials), growth issues<br />
(quality of material at the edges degrades), and performance issues (efficiency at the edges<br />
drops); all these resulting in diminishing return. Eventually 225+ mm diameter will happen<br />
because of new metallization schemes requiring a square shape. Ultimately, full half-square<br />
cells are desirable.<br />
1 – Thin wafers<br />
What are the biggest barriers for adoption of thin wafer technology It is mentioned<br />
that this question was similar to the question about the chicken and the egg, which came<br />
first The anticipated reduction in thicknesses of wafer is delayed each year. Is it the
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> Summary - 2013<br />
manufacturers’ fault or the suppliers’ Everyone wants to go thinner but no one makes a<br />
move. Retooling may be required since current equipment specs is limited to 160um<br />
thicknesses minimum, although not tested for smaller thickness. Retooling is difficult since<br />
everyone is cash strapped. No manufacturer will guarantee that they would buy the<br />
equipment if developed. They are also technical challenges at the microcracks level<br />
(soldering), light trapping, and handling. Right now, before thinking about going thinner,<br />
the best situation might be to make the transition to PERC, and then think about going<br />
thinner.<br />
2 – Metrology<br />
When choosing to implement a metrology technique, what drives your decision<br />
making process the most Are we talking about “preventive” metrology or “process<br />
control/in-line” metrology The first type looks good for the first year in terms or ROI but<br />
then becomes irrelevant. The later one is important and needed constantly specially as cell<br />
architectures and fabrication processes become more sophisticated/complicated. Basically<br />
the drivers are need, ROI, performance improvement at reduced cost, integrated process<br />
control.<br />
3 – Mono-like <strong>Si</strong>licon<br />
Do you believe that the industry will adopt mono-like technology in the future Based<br />
on current and projected interest from ITRPV roadmap, it is not the technology of choice.<br />
Manufacturers in Asia rather stick to the high-performance multi-crystalline <strong>Si</strong>. In terms of<br />
market share, the point was made that the projections for high-performance multi-<strong>Si</strong> still<br />
showing 50% of the market in 2023, which does not make sense since the targeted<br />
efficiencies and cell architectures would require most-likely mono. It was also noted that<br />
mono-like seems to be the natural progression for multi-<strong>Si</strong> and there was nowhere else<br />
multi could go. Last, SunEdison has abandoned all multi/mono-like effort.<br />
4 – Concerns about c-<strong>Si</strong> PV<br />
What is the single thing about c-<strong>Si</strong> PV that keeps you up at night<br />
1. Bad press from misinformed “expert” that is being repeated and amplified<br />
2. Cost-cutting practices will eventually bite us back as products fail in the field<br />
possibly resulting in a Solyndra 2.0 scenario.<br />
3. How to innovate in cash strapped market<br />
4. Much of the silicon material is wasted
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> - 2013<br />
Session 2: Open Discussion<br />
The open discussion during the afternoon session centered on cost modeling and what was<br />
required to stay competitive. The approaches were discussed:<br />
1. NREL’s document, “A Wafer-Based Monocrystalline <strong>Si</strong>licon Photovoltaics Roadmap”<br />
2. Learning curve for module prices as a function of cumulative module shipment<br />
The model estimates an average “long-term” sustainable total module manufacturing cost<br />
to be around $0.64/Wp in the best case scenario for a U.S. based manufacturer (IBC cell at<br />
22.4% that is 80um thick). On the other hand, the average sales prices (ASPs) according to<br />
the later model are estimated to transition from $0.70/Wp in 2012 to $0.55/Wp in 2015.<br />
This seems to indicate that the anticipated decline in cost will continue to render PV<br />
manufacturing difficult to sustain.
U.S. <strong>PVMC</strong> <strong>Report</strong>: 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> Summary - 2013<br />
Summary and Conclusions<br />
In conclusion, the 2 nd <strong>Annual</strong> c-<strong>Si</strong> <strong>PVMC</strong> <strong>Workshop</strong> was very successful. With 32 participants<br />
coming from a variety of different industrial and academic backgrounds, many thought<br />
provoking and stimulating topics were covered in the area of c-<strong>Si</strong> PV manufacturing. Speakers<br />
and attendees were all able to share their perspective on current and future challenges for c-<strong>Si</strong><br />
PV manufacturing and provide input on potential barriers for emerging c-<strong>Si</strong> technologies. Many<br />
different points of view were shared, as both technical and market-related topics were debated<br />
by the workshop participants. The <strong>PVMC</strong> will use this valuable input when moving forward with<br />
the c-<strong>Si</strong> Programs.