Custom Layout & Laker
Custom Layout & Laker Custom Layout & Laker
Custom Layout & Laker 2010 11/09
- Page 2 and 3: Content • Process Flow • Layout
- Page 4 and 5: Fully Custom IC Design Flow
- Page 6 and 7: Process Flow & Layout
- Page 8 and 9: Process Flow & Layout
- Page 10 and 11: Process Flow & Layout
- Page 12 and 13: Layout • Prepare Files - *.tf-Tec
- Page 14 and 15: Laker -GUI
- Page 16 and 17: Laker -Open Library
- Page 18 and 19: Laker -Editor
- Page 20 and 21: Laker -Hot Key
- Page 22 and 23: Laker -Hot Key
- Page 24 and 25: Laker -Hot Key
- Page 26 and 27: Laker -Hot Key
- Page 28 and 29: Laker -Advanced Hot Key Table
- Page 30 and 31: Laker -Advanced Hot Key Table
- Page 32 and 33: Laker -Advanced Hot Key Table
- Page 34 and 35: Laker -Advanced Hot Key Table
- Page 36 and 37: Laker -Advanced Hot Key Table
- Page 38 and 39: Content • Process Flow • Layout
- Page 40 and 41: Calibre
- Page 42 and 43: Calibre DRC -(2)
- Page 44 and 45: Calibre DRC -(4)
- Page 46 and 47: Calibre DRC -(6) • Open the drc f
- Page 48 and 49: Calibre LVS -(1)
- Page 50 and 51: Calibre LVS -(3)
<strong>Custom</strong> <strong>Layout</strong> & <strong>Laker</strong><br />
2010 11/09
Content<br />
• Process Flow<br />
• <strong>Layout</strong> & Process<br />
• <strong>Laker</strong><br />
• Verification (DRC/LVS/PEX)—Calibre
Content<br />
• Process Flow<br />
• <strong>Layout</strong> & Process<br />
• <strong>Laker</strong><br />
• Verification (DRC/LVS/PEX)—Calibre
Fully <strong>Custom</strong> IC Design Flow
Content<br />
• Process Flow<br />
• <strong>Layout</strong> & Process<br />
• <strong>Laker</strong><br />
• Verification (DRC/LVS/PEX)—Calibre
Process Flow & <strong>Layout</strong>
Process Flow & <strong>Layout</strong>
Process Flow & <strong>Layout</strong>
Process Flow & <strong>Layout</strong>
Process Flow & <strong>Layout</strong>
Content<br />
• Process Flow<br />
• <strong>Layout</strong> & Process<br />
• <strong>Laker</strong>
<strong>Layout</strong><br />
• Prepare Files<br />
– *.tf–Technology file of the process<br />
– *.map –Define layer number<br />
• Put files in the directory<br />
• Type the command ―laker &”
<strong>Laker</strong> –Resolution<br />
• Edit *.tf<br />
• Please Set Resolution 0.005 for 0.18um<br />
Process
<strong>Laker</strong> -GUI
<strong>Laker</strong> –New Design
<strong>Laker</strong> –Open Library
<strong>Laker</strong> –Editor
<strong>Laker</strong> –Editor
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Hot Key
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced Hot Key Table
<strong>Laker</strong> –Advanced IO
Content<br />
• Process Flow<br />
• <strong>Layout</strong> & Process<br />
• <strong>Laker</strong><br />
• Verification (DRC/LVS/PEX)—Calibre
Verification (DRC/LVS/PEX)—<br />
Calibre<br />
• DRC( Design Rule Check )<br />
– checks physical layout data against fabricationspecific<br />
rules<br />
• LVS( <strong>Layout</strong> Versus Schematic )<br />
– checks the connectivity of a physical layout<br />
design to its related schematic<br />
• PEX( Parasitic EXtraction using XCalibre )<br />
– extracts the parasitic effect resulted from the<br />
interconnection of layout design
Calibre
Calibre DRC –(1)
Calibre DRC –(2)
Calibre DRC –(3)
Calibre DRC –(4)
Calibre DRC –(5)
Calibre DRC –(6)<br />
• Open the drc file, you can check the design<br />
rule
Calibre DRC –(7)<br />
• EX:<br />
0.23 um<br />
0.23 um
Calibre LVS –(1)
Calibre LVS –(2)
Calibre LVS –(3)
Calibre LVS –(4)
Calibre LVS –(5)
Calibre LVS –(6)
Calibre LVS –(7)
Calibre LVS –(8)
Calibre LVS –(9)
Type of Parasites
Calibre PEX –(1)
Calibre PEX –(2)
Calibre PEX –(3)
Calibre PEX –(4)
Calibre PEX –(5)<br />
– Paratactic Extraction (R+C+CC)<br />
– .pex file, .pxi file and .pex.pex<br />
• Pex file is just like the SP file you exported<br />
from composer<br />
• Pxi file: Parasitic capacitance between metal<br />
line and devices<br />
• Pex.Pex: Parasitic resistance capacitance of<br />
metal line
Calibre PEX –(6)<br />
• Hspice<br />
– Remember to put all 3 files along with the .lib in<br />
the same folder<br />
• Example: subckt in pex file
Testbench
Thank you!