Programmable Logic Design Quick Start Handbook
Programmable Logic Design Quick Start Handbook
Programmable Logic Design Quick Start Handbook
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DESIGN REFERENCE BANK<br />
Full-functioning software design tools for Xilinx CPLDs are free of charge<br />
and may be downloaded from the Xilinx website. Thus, your first project using<br />
CPLDs can be not only quick and painless, but very cost-effective as well.<br />
(Excerpted from the Xilinx Xcell Journal, Issue 39, Spring 2001.)<br />
Documentation and Example Code<br />
The following is a list of selected application notes, white papers, tutorials,<br />
and example code that can be downloaded from the Xilinx website.<br />
This list grows longer as more applications are developed. For the latest list,<br />
please visit www.xilinx.com/apps/appsweb.htm.<br />
TABLE 7-1: DOCUMENTATION LIST<br />
Title Number Family<br />
<strong>Design</strong><br />
Code<br />
Embedded Instrumentation<br />
Using XC9500 CPLDs<br />
Configuring Xilinx FPGAs<br />
Using an XC9500 CPLD and<br />
Parallel PROM<br />
Xilinx FPGAs: A Technical<br />
Overview for the First-Time<br />
User<br />
Choosing a Xilinx Product<br />
Family<br />
XAPP076<br />
XAPP079<br />
XAPP097<br />
XAPP100<br />
XC9500<br />
XC9500<br />
FPGA<br />
All<br />
XC9500 Remote Field Upgrade XAPP102 XC9500<br />
A <strong>Quick</strong> JTAG ISP Checklist XAPP104 XC9500<br />
A CPLD VHDL Introduction XAPP105 XC9500<br />
Adapting ASIC <strong>Design</strong>s for<br />
Use with Spartan FPGAs<br />
170 MHz FIFOs using the<br />
Virtex Block SelectRAM+<br />
Feature<br />
XAPP119<br />
XAPP131<br />
Spartan<br />
Virtex<br />
Synthesizable High-<br />
Performance SDRAM<br />
Controllers<br />
XAPP134 Virtex FREE<br />
VHDL<br />
and<br />
Verilog<br />
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