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QDK PIC24/dsPIC-XC16 - Quantum Leaps

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<strong>QDK</strong><br />

<strong>PIC24</strong>/<strong>dsPIC</strong>-<strong>XC16</strong><br />

www.state-machine.com/pic<br />

3. After hitting the breakpoint in QK_sched_() function, you must first disable the Timer2 interrupts by<br />

clearing bit #7 in the IEC0 register at address 0x0094, in the “File Registers” window, in the similar<br />

way as you set the bit #0 in the IFS0 register to trigger INT0.<br />

4. Next, you single step into the QK_sched_(). (NOTE: you might want to close the “File Registers”<br />

window to speed up the single stepping.) You verify that the scheduler invokes a state handler of the<br />

Table state machine. This proves that the Table task preempts the Philosopher task.<br />

5. After this you free-run the application and verify that the next breakpoint hit is the one inside the<br />

Philosopher state machine. This validates that the preempted task continues executing only after<br />

the preempting task (the Table state machine) completes.<br />

4.4.3 Other Tests<br />

Other interesting tests that you can perform include changing priority of the INT0 ISR to be lower than the<br />

priority of Timer2 ISR to verify that the QK scheduler is still called only after all interrupts complete.<br />

In yet another test you could post an event to Philosopher active object rather than Table active object<br />

from the INT0 ISR to verify that the QK scheduler will not preempt the Philosopher task by itself. Rather<br />

the extra event will be queued and the Philosopher task will process the queued event only after<br />

completing the current event processing.<br />

Copyright © <strong>Quantum</strong> <strong>Leaps</strong>, LLC. All Rights Reserved.<br />

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