Tutorial Xilinx Virtex-5 FPGA ML506 Edition

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Turn on the ML506 and open up a serial terminal program such as HyperTerminal, TeraTerm, Putty etc.. Here I use TeraTerm, and set it up for serial communication on COM1 with 9600 baude: Click on Xilinx Tools → Program FPGA: Point the Bitstream and BMM File entries to the files exported by Xilin XPS and under the microblaze_0 processor entry choose the hello_uart.elf file: Click Program and Xilinx SDK will combine the .bit, .bmm, .elf, files into a single bitstream called 'download.bit' located in C:\ml506-edk-13-2\sdk\UART_Test. 80
I suggest you rename this file to something more meaningful like hellouart.bit. The FPGA is now programmed and you can see the results in the terminal window: Play sound with a sine wave using the AC97 codec Summary This tutorial makes use of the AC97 codec, LCD, UART (for text display) to play some sine waves through the line-in port of the AC97 interface. User instructions will be displayed to a COM serial window such as HyperTerminal or TeraTerm. Also some simple instruction will be displayed to the user via the on-board LCD screen. To avoid reinventing the wheel, we will use some Xilinx pre-made board configuration files and software. Xilinx XPS In order to use the on-board AC97 codec we would have to read the datasheet for the codec available here: http://www.xilinx.com/products/boards/ml505/datasheets/87560554AD1981B_c.pdf Then we would have to use our MicroBlaze softprocessor to setup AC97 according to its datasheet. But Xilinx has already done this for use so we can just use theirs and tailor it to our needs. First lets setup our file system to organize our project. 81
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Tutorial Xilinx Virtex-5 FPGA ML506
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Setting up the ML506 board The ML50
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• Set SW6 (on the back side of th
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• Go to setup → serial port, an
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Illustration 1: SACE ERR, CF card i
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Once this is complete, right-click
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After connecting your board. Run Te
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The VHDL Design Open up Xilinx ISE.
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Now setup the project settings for
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Select VHDL module and name the fil
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p1
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At the top click on Project → New
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Now that our code is finished we ha
Page 29 and 30: Programming the FPGA using iMPACT N
Page 31 and 32: If all is well, you should see the
Page 33 and 34: That's it! Your 2-bit greater-than
Page 35 and 36: Creating the Design First make sure
Page 38 and 39: Once Simulink is open make a new mo
Page 40 and 41: Now we will create a new compilatio
Page 42 and 43: Leave the board on and click 'Detec
Page 44 and 45: Click Save and Close, then click 'A
Page 46: Once the installation is complete,
Page 49 and 50: After dragging in the box, a window
Page 51 and 52: Double-click on the System Generato
Page 54 and 55: Click ok. Make sure your board is o
Page 56 and 57: Then you can toggle the GPIO switch
Page 58 and 59: Now within this folder make two emp
Page 60 and 61: In the Project File section point i
Page 62 and 63: Choose the development board, in ou
Page 64 and 65: Choose these default values for the
Page 66 and 67: Click Next on the Cache window as w
Page 68 and 69: The base system is now finished but
Page 70 and 71: Xilinx SDK Close Xilinx XPS and ope
Page 72 and 73: The Xilinx SDK will prompt you to s
Page 74 and 75: In the next window, name the projec
Page 76 and 77: Expand the 'src' folder under the '
Page 78 and 79: Now right-click on the hello_uart p
Page 82 and 83: Create a folder on the local drive
Page 84 and 85: Then copy these files and put them
Page 86 and 87: Since this Xilinx project was creat
Page 88 and 89: Finally, click Finish: 88
Page 90 and 91: Xilinx SDK Close Xilinx XPS and ope
Page 92 and 93: Name the C project 'play_sine' and
Page 94 and 95: The files I will be using can be fo
Page 96 and 97: * local prototypes */ volatile int
Page 98 and 99: WriteAC97Reg(AC97_ExtendedAudioStat
Page 100 and 101: XIo_Out32(AC97_InFIFO, j); } } int
Page 102 and 103: Next we need to add some header fil
Page 104 and 105: Program the FPGA Turn on the ML506
Page 106 and 107: Some instructions are also displaye
Page 108 and 109: Create a folder on your local drive
Page 110 and 111: Now we need the bitstream of our pr
Page 112 and 113: Setting up the Compact Flash Make s
Page 114: Since our file is in cfg1, we need
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Tutorial Xilinx Virtex-5 FPGA ML506 Edition

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