CD4027BM CD4027BC Dual JK Master Slave Flip-Flop with Set and ...

CD4027BMCD4027BC Dual J-K MasterSlave
Flip-Flop with Set and Reset
General Description
These dual J-K flip-flops are monolithic complementary
MOS (CMOS) integrated circuits constructed with N- and P-
channel enhancement mode transistors Each flip-flop has
independent J K set reset and clock inputs and buffered
Q and Q outputs These flip-flops are edge sensitive to the
clock input and change state on the positive-going transition
of the clock pulses Set or reset is independent of the clock
and is accomplished by a high level on the respective input
All inputs are protected against damage due to static discharge
by diode clamps to V DD and V SS
Schematic and Connection Diagrams
Dual-In-Line Package
Features
February 1988
Y Wide supply voltage range 30V to 15V
Y High noise immunity 045 VDD (typ)
Y Low power TTL Fan out of 2 driving 74L
compatibility
or 1 driving 74LS
Y Low power 50 nW (typ)
Y Medium speed operation 12 MHz (typ)
with 10V supply
Order Number CD4027B
TLF5958–1
CD4027BMCD4027BC Dual J-K MasterSlave Flip-Flop with Set and Reset
Top View
TLF5958–2
C1995 National Semiconductor Corporation
TLF5958
RRD-B30M105Printed in U S A

Absolute Maximum Ratings (Note 1 and 2)
If MilitaryAerospace specified devices are required
please contact the National Semiconductor Sales
OfficeDistributors for availability and specifications
DC Supply Voltage (V DD )
b05 V DC to a18 V DC
Input Voltage (V IN )
b05V to V DD a05 V DC
Storage Temperature Range (T S ) b65Ctoa150C
Power Dissipation (P D )
Dual-In-Line
700 mW
Small Outline
500 mW
Lead Temperature (T L )
(Soldering 10 seconds)
260C
Recommended Operating
Conditions (Note 2)
DC Supply Voltage (V DD )
Input Voltage (V IN )
Operating Temperature Range (T A )
CD4027BM
CD4027BC
3Vto15V DC
0VtoV DD V DC
b55Ctoa125C
b40Ctoa85C
DC Electrical Characteristics CD4027BM (Note 2)
Symbol Parameter Conditions
b55C a25C a125C
Min Max Min Typ Max Min Max
I DD Quiescent Device Current V DD e 5V V IN e V DD or V SS 1 1 30 mA
V DD e 10V V IN e V DD or V SS 2 2 60 mA
V DD e 15V V IN e V DD or V SS 4 4 120 mA
V OL Low Level lI Ol k 1 mA
Output Voltage V DD e 5V 005 0 005 005 V
V DD e 10V 005 0 005 005 V
V DD e 15V 005 0 005 005 V
V OH High Level lI Ol k 1 mA
Output Voltage V DD e 5V 495 495 5 495 V
V DD e 10V 995 995 10 995 V
V DD e 15V 1495 1495 15 1495 V
V IL Low Level V DD e 5V V O e 05V or 45V 15 15 15 V
Input Voltage V DD e 10V V O e 1V or 9V 30 30 30 V
V DD e 15V V O e 15V or 135V 40 40 40 V
V IH High Level V DD e 5V V O e 05V or 45V 35 35 35 V
Input Voltage V DD e 10V V O e 1V or 9V 70 70 70 V
V DD e 15V V O e 15V or 135V 110 110 110 V
I OL Low Level Output V DD e 5V V O e 04V 064 051 088 036 mA
Current (Note 3) V DD e 10V V O e 05V 16 13 225 09 mA
V DD e 15V V O e 15V 42 34 88 24 mA
I OH High Level Output V DD e 5V V O e 46V b064 b051 b088 b036 mA
Current (Note 3) V DD e 10V V O e 95V b16 b13 b225 b09 mA
V DD e 15V V O e 135V b42 b34 b88 b24 mA
I IN Input Current V DD e 15V V IN e 0V b01 b10b5 b01 b10 mA
V DD e 15V V IN e 15V 01 10 b5 01 10 mA
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices
should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 V SS e 0V unless otherwise specified
Note 3 I OH and I OL are tested one output at a time
Units
2

DC Electrical Characteristics CD4027BC (Note 2)
Symbol Parameter Conditions
b40C a25C a85C
Min Max Min Typ Max Min Max
I DD Quiescent Device Current V DD e 5V V IN e V DD or V SS 4 4 30 mA
V DD e 10V V IN e V DD or V SS 8 8 60 mA
V DD e 15V V IN e V DD or V SS 16 16 120 mA
V OL Low Level lI Ol k 1 mA
Output Voltage V DD e 5V 005 0 005 005 V
V DD e 10V 005 0 005 005 V
V DD e 15V 005 0 005 005 V
V OH High Level lI Ol k 1 mA
Output Voltage V DD e 5V 495 495 5 495 V
V DD e 10V 995 995 10 995 V
V DD e 15V 1495 1495 15 1495 V
V IL Low Level V DD e 5V V O e 05V or 45V 15 15 15 V
Input Voltage V DD e 10V V O e 1V or 9V 30 30 30 V
V DD e 15V V O e 15V or 135V 40 40 40 V
V IH High Level V DD e 5V V O e 05V or 45V 35 35 35 V
Input Voltage V DD e 10V V O e 1V or 9V 70 70 70 V
V DD e 15V V O e 15V or 135V 110 110 110 V
I OL Low Level Output V DD e 5V V O e 04V 052 044 088 036 mA
Current (Note 3) V DD e 10V V O e 05V 13 11 225 09 mA
V DD e 15V V O e 15V 36 30 88 24 mA
I OH High Level Output V DD e 5V V O e 46V b052 b044 b088 b036 mA
Current (Note 3) V DD e 10V V O e 95V b13 b11 b225 b09 mA
V DD e 15V V O e 135V b36 b30 b88 b24 mA
I IN Input Current V DD e 15V V IN e 0V b03 b10b5 b03 b10 mA
V DD e 15V V IN e 15V 03 10 b5 03 10 mA
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the devices
should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 V SS e 0V unless otherwise specified
Note 3 I OH and I OL are tested one output at a time
Units
3

AC Electrical Characteristics T A e 25C C L e 50 pF t rCL e t fCL e 20 ns unless otherwise specified
Symbol Parameter Conditions Min Typ Max Units
t PHL or t PLH Propagation Delay Time V DD e 5V 200 400 ns
from Clock to Q or Q V DD e 10V 80 160 ns
V DD e 15V 65 130 ns
t PHL or t PLH Propagation Delay Time V DD e 5V 170 340 ns
from Set to Q or Reset to Q V DD e 10V 70 140 ns
V DD e 15V 55 110 ns
t PHL or t PLH Propagation Delay Time V DD e 5V 110 220 ns
from Set to Q or V DD e 10V 50 100 ns
Reset to Q V DD e 15V 40 80 ns
t S Minimum Data Setup Time V DD e 5V 135 270 ns
V DD e 10V 55 110 ns
V DD e 15V 45 90 ns
t THL or t TLH Transition Time V DD e 5V 100 200 ns
V DD e 10V 50 100 ns
V DD e 15V 40 80 ns
f CL Maximum Clock Frequency V DD e 5V 25 5 MHz
(Toggle Mode) V DD e 10V 62 125 MHz
V DD e 15V 76 155 MHz
t rCL or t fCL Maximum Clock Rise V DD e 5V 15 ms
and Fall Time V DD e 10V 10 ms
V DD e 15V 5 ms
t W Minimum Clock Pulse V DD e 5V 100 200 ns
Width (t WH e t WL ) V DD e 10V 40 80 ns
V DD e 15V 32 65 ns
t WH Minimum Set and V DD e 5V 80 160 ns
Reset Pulse Width V DD e 10V 30 60 ns
V DD e 15V 25 50 ns
C IN Average Input Capacitance Any Input 5 75 pF
C PD Power Dissipation Capacity Per Flip-Flop
(Note 4)
35 pF
AC Parameters are guaranteed by DC correlated testing
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed They are not meant to imply that the
devices should be operated at these limits The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual
device operation
Note 2 V SS e 0V unless otherwise specified
Note 3 I OH and I OL are tested one output at a time
Note 4 C PD determines the no load AC power consumption of any CMOS device For complete explanation see 54C74C Family Characteristics application
note AN-90
4

Typical Applications
Ripple Binary Counters
TLF5958–3
Shift Registers
TLF5958–4
Truth Table
tnb1 Inputs
X tn Outputs
Where
CLU J K S R Q Q Q
L I X O O O I O
L X O O O I I O
L O X O O O O I
L X I O O I O I
K X X O O X (No Change)
X X X I O X I O
X X X O I X O I
X X X I I X I I
I e High Level
O e Low Level
U e Level Change
X e Don’t Care
e t nb1 refers to the time interval prior to the positive clock pulse transition
X e t n refers to the time intervals after the positive clock pulse transition
5

CD4027BMCD4027BC Dual J-K MasterSlave Flip-Flop with Set and Reset
Physical Dimensions inches (millimeters)
LIFE SUPPORT POLICY
Ceramic Dual-In-Line Package (J)
Order Number CD4027BMJ or CD4027BCJ
NS Package Number J16A
Molded Dual-In-Line Package (N)
Order Number CD4027BMN or CD4027BCN
NS Package Number N16E
NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF NATIONAL
SEMICONDUCTOR CORPORATION As used herein
1 Life support devices or systems are devices or 2 A critical component is any component of a life
systems which (a) are intended for surgical implant support device or system whose failure to perform can
into the body or (b) support or sustain life and whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system or to affect its safety or
with instructions for use provided in the labeling can effectiveness
be reasonably expected to result in a significant injury
to the user
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