Low-Power Logic Synthesis
Low-Power Logic Synthesis
Low-Power Logic Synthesis
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Multiple Supply Voltages<br />
• Basic idea<br />
– Slow down non-critical paths won’t increase cycle time<br />
– So supply voltages of non-critical components can be reduced<br />
• Implementation<br />
– Architecture level: reduce power supply voltage for selected<br />
modules<br />
– <strong>Logic</strong> level: use dual power supply voltages<br />
• Integer Linear Programming (ILP) technique is used to find the best<br />
solution<br />
• Problem: unmatched voltage swing may actually increase power<br />
NCHUCS 7
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