Low-Power Logic Synthesis
Low-Power Logic Synthesis
Low-Power Logic Synthesis
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Selecting Retimed Block<br />
• Goal<br />
– Find a logic block which, when retimed, maximizes the<br />
reduced switching activities<br />
– The retimed block must be small in order to reduce the<br />
extra registers<br />
• In our experiment, at most 2 registers are need<br />
• Need to estimate the switching activities<br />
NCHUCS 27
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