Low-Power Logic Synthesis
Low-Power Logic Synthesis
Low-Power Logic Synthesis
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Partition<br />
• Based on Shannon’s Expansion<br />
f ( x 1<br />
, K,<br />
x ) = x f +<br />
n<br />
i<br />
x<br />
x<br />
i<br />
f<br />
i x i<br />
R<br />
1<br />
f<br />
xi<br />
MUX<br />
f<br />
x 1 … x n<br />
R<br />
2<br />
f<br />
xi<br />
x i<br />
NCHUCS 21
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