Hardware Design Guide Revision 0.3 - elinux
Hardware Design Guide Revision 0.3 - elinux
Hardware Design Guide Revision 0.3 - elinux
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tCS<br />
tCR<br />
Figure 7. SPI Write Timing<br />
Doc No: WG7310-00-HDG-R03<br />
Table 5. SPI Read/Write Switching characteristics<br />
Parameter Min. Max. Unit<br />
Delay time, CS↓ to DIN read/write command<br />
valid<br />
Delay time, DIN read command invalid to<br />
DOUT/DIN card response valid<br />
tbusy Fixed busy delay till DOUT data valid 1 7<br />
tEC Delay time, DOUT data invalid CS↑ 0<br />
tDB Data block size 1<br />
4.2.2. SPI Clock Timing<br />
Copyright © JORJIN TECHNOLOGIES INC. LIMITED 2009<br />
CONFIDENTIAL<br />
0<br />
1<br />
16 Clock<br />
Cycles<br />
16 Clock<br />
Cycles<br />
16/32 Clock<br />
Cycles<br />
16 Clock<br />
Cycles<br />
16/32 Clock<br />
Cycles<br />
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