A robust feedforward compensation scheme for multistage ...

THANDRI AND SILVA-MARTÍNEZ: ROBUST FEEDFORWARD COMPENSATION SCHEME FOR MULTISTAGE OTAS WITH NO MILLER CAPACITORS 243
transfer functions are around 6 and 10 dB at low frequencies,
respectively. Post-layout simulation and experimental results
for the single-ended amplifier using integrating and feedback
capacitors of 5 pF are compared in Table II.
CONCLUSION
A compensation scheme for multistage amplifiers with no
Miller capacitors was proposed. This scheme uses positive
phase shift of LHP zeros created by the feedforward path
to cancel the negative phase shift of the poles (closed-loop
dominant pole). A single-ended amplifier using the proposed
NCFF compensation scheme was designed and fabricated in
AMI 0.5- m technology. The amplifier combines high gain,
high gain bandwidth, and good phase margin. Pulse response
shows that the phase margin is better than 45 for capacitors in
the range of 0.25–10 pF. The effect of pole–zero mismatch on
the amplifier performance was studied and it was shown that
the pole–zero cancellation should occur at high frequencies
for best settling-time performance. Experimental results of the
OTA show fast settling time and good stability.
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Bharath Kumar Thandri received the B.E. (Hons)
degree in computer science from Birla Institute of
Technology and Science, Pilani, India, in 1998 and
the M.S. degree in electrical engineering from Texas
A&M University, College Station, in 2001.
From 1998 to 1999, he worked in the DSP group of
Texas Instruments (India) Ltd., Bangalore, where he
developed software simulators for TI’s C6X range of
DSPs. He was an Intern in the Computer Peripherals
and Control Products Group of Texas Instruments,
Dallas, TX, in the fall of 2000. Since November 2001,
he has been with Cypress Semiconductors, Austin, TX, where he is working
on the design of optical communication transceiver ICs and mixed-signal CAD
flow development. His main research interests are in the area of high-performance
and high-frequency analog circuits for communication and signal-processing
ICs.
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José Silva-Martínez (SM’98) was born in
Tecamachalco, Puebla, México. He received the
B.S. degree in electronics from the Universidad
Autónoma de Puebla in 1979, the M.Sc. degree
from the Instituto Nacional de Astrofísica Optica y
Electrónica (INAOE), Puebla, in 1981, and the Ph.D.
degree from the Katholieke Univesiteit Leuven,
Leuven, Belgium, in 1992.
From 1981 to 1983, he was with the Department
of Electrical Engineering, INAOE, where he was
involved with switched-capacitor circuit design.
In 1983, he joined the Department of Electrical Engineering, Universidad
Autónoma de Puebla, where he remained until 1993. He was a cofounder of
the graduate program on opto-electronics in 1992. From 1985 to 1986, he was
a Visiting Scholar in the Department of Electrical Engineering, Texas A&M
University, College Station. In 1993, he rejoined the Department of Electrical
Engineering, INAOE, and from May 1995 to December 1998, was the Head
of the Electronics Department. He was a cofounder of the Ph.D. program on
electronics in 1993. He is currently with the Analog and Mixed Signal Center,
Department of Electrical Engineering, Texas A&M University, where he is
an Associate Professor. He is the inaugural holder of the TI Professorship I
in Analog Engineering, Texas A&M University. His current field of research
is in the design and fabrication of integrated circuits for communication and
biomedical application.
Dr. Silva-Martínez has served as IEEE Circuits and Systems Vice President
Region 9 (1997–1998), and as Associate Editor for IEEE TRANSACTIONS ON
CIRCUITS AND SYSTEMS PART II from 1997 to 1998 and May 2002 until the
present. He was the main organizer of the 1998 and 1999 International IEEE
Circuits and Systems Tour in region 9, and Chairman of the International Workshop
on Mixed-Mode IC Design and Applications (1997–1999). He was a corecipient
of the 1990 European Solid-State Circuits Conference Best Paper Award.