Full TCP & UDP Offload Core and Systems Ultra high Performance ...

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Why in FPGA •Spec changes •TCP spec updates/RFC updates are easily adaptable. •Design Spec changes are implemented more easily •Future enhancements •Addition of features, Improvements in code for higher throughput/lower latency, upgrading to 40G/100G are much easier. •Next generation products can be introduced much faster and cheaper Santa Clara, CA USA April 2013 16
Intilop’s TOE/UOE – Key Features •Scalability and Design Flexibility •The architecture can be scaled up to 40G MAC+TOE/UOE • Scalability of internal FIFO/Mem from 64 bytes to 16K bytes that can be allocated on a per session basis and to accommodate very ‘Large Send’ data for even higher throughput. •Implements an optimized and simplified ‘Data Streaming interface’ (No INTRs, Asynchronous communication between User and TOE) •Asynchronous User interface that can run over a range of Clk speeds for flexibility. •Gives user the ability to target to slower and cheaper FPGA devices. Santa Clara, CA USA April 2013 17
Page 1 and 2: Full TCP & UDP Offload Core and Sys
Page 3 and 4: Network Traffic Growth Global IP tr
Page 5 and 6: TCP/UDP Offload VS Non Offload Appl
Page 7 and 8: Why TCP/IP Software is too slow Tra
Page 9 and 10: Why TCP/IP Software is Slow •TCP/
Page 11 and 12: Market Opportunity Accelerated Fina
Page 13 and 14: TCP/IP protocol hardware implementa
Page 15: Why in FPGA •Speed and ease of de
Page 19 and 20: 10 G bit TOE - Key Features • Com
Page 21: THANK YOU Santa Clara, CA USA April

Full TCP & UDP Offload Core and Systems Ultra high Performance ...

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