Elektronika 2009-11.pdf - Instytut Systemów Elektronicznych

tasks: T 0 , T 4 , T 5 , T 6 and T 7 with a triple speed (as compared
to the standard universal processor). The system structure
and schedule are shown in Fig. 5 (variant c) and Table 2 (variant
c), respectively. Please notice, that in such variant the
specialized resource is assigned no function in the time period
2-3, 6 and 9, and the universal processor completes processing
of usable tasks in 9 time units, while ASIC processor
completes performing its function in 8 time units. Accordingly,
the required deadline was reached in 9 units.
The cost of the other structure shall be estimated as follows.
If we assume that each usable task performed by a universal
processor needs one memory unit dedicated to such
task, and task assigned to ASIC processor do not need dedicated
memory units the system cost is:
C S = m • C P + n u • C M + p • C ASIC (2)
where: m - the number of identical parallel processors, n u - the
number of tasks assigned to universal processors, p - the number
of specialized ASIC processors devoted for processing remaining
n - n u tasks. For the requirements: “1.”, “2.”, “3.”, “4.”: m =
4, n u = 10, p = 0. For the requirements: “1.” + “2.” + “3.” + “4.”, in
the first variant, m = 5, n u = 10, p = 0. In the second variant, where
one ASIC processor is applied, m = 3, n u = 6 and p = 1.
The paper describes concurrent allocation of resources
and of tasks in complex frameworks. Moreover, this paper
presents simple, practical example of synthesis and management
of system with fault tolerance. The strategy of self testing
based at multiprocessors structure and application of
two-processors tasks.
This work was supported by the Polish Ministry of Science and
High Education as a 2007-2010 research project.
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The security level of particular blind
steganographic systems
(Zabezpieczenie określonego poziomu niewidoczności
w systemach steganograficznych)
prof. dr hab. inż. JERZY KOROSTIL, mgr inż. ŁUKASZ NOZDRZYKOWSKI
Faculty of Computer Science, West Pomeranian University of Technology, Szczecin
Steganographic hidden messages in digital graphic image should
not lead to visible distortions in the resulting image [1,2]. There
are many methods of reducing the occurrence of distortion. One
of these methods is presented in the article [3], where by using of
specified threshold values it rejects blocks which statistical metrics
reveal the existence of a single structure. Hidden messages
in such block would result in the occurrence of visible distortions.
This article proposes the utilization of human visual perception
and its limits that the message is hidden below the
threshold of human vision. It enables the examination of proposed
steganographic methods to ensure a proper level of
concealment of hidden message.
Determining the size of distortions
caused by steganographic hiding
messages
Steganographic hiding messages in digital images can cause
significant distortion of the resulting image, what disqualifies
the method or the picture in which the data are hidden. Particularly
important are the distortions visible by the human
eye. It can take different measures to determine the changes
which arise as a result of steganographic algorithm, and what
does not always reflect the actual level of distortion visible to
human being.
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