FPGA Anti-Copy Protection System - ALSE

I. INTRODUCTION
Inadequate design security is emerging as one of the single largest threats to the intellectualproperty-based
economies of the modern world. Consequences of inadequate design security can
include lost revenue due to counterfeit products and increased liability due to product tampering.
Copy protection issues do not concern ASIC designers, but most SRAM-based FPGA designers
must keep in mind that the precious bitstream can very easily be cloned and reused by
unauthorized parties. Some FPGA vendors offer now specific families that implement protection
schemes, but we'll see that any FPGA can benefit from the simple solution developed by ALSE.
ALSE's solutions
As a response to this copy protection challenge, ALSE introduced two highly cost-effective
fixed-secret authentication schemes based on a cheap and secure authentication device. In
both solutions, the authentication is achieved through a variable challenge-response mechanism
and user secret keys. Communication with the host is achieved through a single wire interface,
in order to avoid consuming precious I/Os, and to simplify the board layout.
The solution is based on :
1. A small footprint cryptography & verification engine inside the FPGA (~380 Logic Cells).
2. An external authentication component which embed is the same crypto engine.
One version of the Protection kit is based on Intersil components (ISL 6296 / ISL 9206), the
other version can be fitted in any secure and inexpensive CPLD, like Altera's MaxII
EPM240. For quantities, such a device should cost in the 1 € range.
3. A one-wire communication protocol allowing the FPGA to challenge the external device
with an interrogation code and retrieve the response to be compared with the value
calculated internally.
Thanks to the small FPGA area required, the one-wire communication, and the low cost and small
size of the authentication engine, adding security to just any FPGA design is both easy and
affordable, even if the decision to protect the design comes as an after-thought.
Due to these features, it is quite easy to add this anti-copy scheme even to a design that wasn't
planned initially to implement it. A small PCB area and one or two I/Os available on the FPGA are
sufficient to secure a design.
Important : any FPGA can be protected with our Anti-Copy Kit. The customer must specify, at time
of purchase, the unique device family to protect.
Any processor-based system could potentially be protected by our Anti-Copy Max II device, but
ALSE will not provide the internal algorithm, as would be necessary to implement the protection in
software. As a consequence, this Anti-Copy Kit is not usable for processor protection schemes,
except when the processor is embedded in an Altera FPGA (SOPC).
An advantage of the CPLD protection (as opposed to using a dedicated device) is that the CPLD
can be reprogrammed, thus providing the possibility to update or change the protection scheme at
any time on an existing board without any hardware change.
Commercial model
ALSE offers a single price for protecting a single but complete FPGA family for as many projects
as desired within the same company, using a unique set of encryption keys.
The generation of other sets for different FPGA families or different encryption keys is a (very
affordable) option.
Advantages
This Anti-Copy Protection Kit offers many advantages :
➢ Several authentication device are possible with no risk of obsolescence (CPLD).
➢ Since no source code is available, the risk of leaks within the company can be easily controlled.
Furthermore, there is no specific tool or development system to purchase.
© ALSE Introduction do ALSE's Anti-Copy Protection 2