60-265: Fall 2010 Computer Architecture I: Digital Design Exercise 6 ...

60-265: Fall 2010 Computer Architecture I: Digital Design
Exercise 6 – Sequential Circuits
Question 1. Flip-Flops and state tables [ 2 marks ]
A sequential circuit has two D flip-flops A and B, two inputs X and Y, and one output Z. The
flip-flop input equations (ie. characteristic equations) and the circuit output are as follows, using
A and B to indicate the initial outputs from the two D flip-flops.
D A = X' Y + X A D B = X' B + X A Z = B
a. Draw the logic diagram of the circuit.
b. Tabulate (ie. draw and complete) the state table.

Question 2. Count-down Counter [ 4 marks ]
Design a 2-bit count-down counter. This is a sequential circuit with two flip-flops and one input
X. When X=0, the state of the flip-flops does not change. However, when X=1, the state
sequence is 11, 10, 01, 00, then back to 11 and the sequence repeats. (Under normal use, X=1 is
applied for a short time during which the circuit counts down by one to obtain the final stored
result. Additional pulses of X=1 continue the counting down operation.)
The state table is shown below:
1
This leads to the Boolean logic expressions:
A + = X’A + X(AB + A’B’)
B + = X’B + XB’

These expressions can be drawn as block circuit diagrams using AND-OR gates,
or including XOR and XNOR gates. The A and B inputs on the right hand side
are the original stored values in the flip-flops and the resulting expression values
are fed back to the inputs of the flip-flops to produce the final outputs A + and B + .
For this type of circuit the D type flip-flop is quite suitable.
The block diagram is left as a straightforward exercise for students.
Question 3. J-K Up-Down Counter [ 4 marks ]
Design a sequential circuit with two J-K flip-flops A and B and two inputs E and X. If E=0, the
circuit remains in the same state regardless of the value of X. When E=1 and X=1, the circuit
goes "up" through the state transitions from 00 to 01 to 10 to 11 and back to 00, then repeating.
When E=1 and X=0, the circuit goes "down" through the state transitions from 00 to 11 to 10 to
01 back to 00, then repeating. (Note that if the E=1 and X inputs are applied only long enough to
produce a single state transition, then a new set of inputs E=1 and the complement value of the
previous X input is applied, the counter can be used to count up/down first, then count down/up).
The state table is shown below:
This leads to the Boolean logic expressions:
A + = EX’(AB+A’B’) + EX(AB’+A’B) + E’A
B + = EB’ + E’B
These expressions can be drawn as block circuit diagrams using AND-OR gates,
or including XOR and XNOR gates. The A and B inputs on the right hand side
are the original stored values in the flip-flops and the resulting expression values
are fed back to the inputs of the flip-flops to produce the final outputs A + and B + .

It is required that you use J-K flip-flops for this question. By connecting the
expression outputs to the J-input, and the complement of the expression to the K-
input, you basically transform the JK to a D type flip-flop.
The block diagram is left as a straightforward exercise for students.
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