Electronics and Telecommunication Engineering - Vishwakarma ...

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Bansilal Ramnath Agarwal Charitable Trust’s Vishwakarma Institute of Technology, Pune – 411 037 Department of Electronics and Telecommunication Engineering FF No.: 654 EC 30304: POWER & INTEGRATED CIRCUITS LAB Credits: 1 Teaching Scheme: - Laboratory 2 Hrs/Week Part A :: Power Electronics Objectives: • To study characteristics of Power devices • To study power circuits and control circuits. • Mapping with PEOs:2,3,5,6,7,8,9 To study Triggering circuits for SCR. • To study Driver circuits for IGBT / MOSFET. • To simulate power electronic conversion system (AC-DC/DC-DC/DC-AC), with suitable load. • To study power electronic conversion system with R/L/E load (AC-DC/DC- DC/DC-AC). • Project based on power electronic circuit design. • To write VHDL code, simulate and implement 1 bit full adder/ Multiplexer/decoder • To write VHDL code, simulate and implement D Flip flop/ Shift register/BCD Counter • To write VHDL code, simulate and implement a state machine description sequence detector / counter. • To study the characteristics of CMOS logic gate. • Project based on Hardware description language and simulation tool. Text Books 1. M. H. Rashid, “POWER ELECTRONICS circuits devices and applications”, PHI, 3 rd edition, 2004, New Delhi. 2. “A VHDL Primer”, J Bhaskar, Pearson,2000. Structure & Syllabus of B.E (E&TC) Program – Pattern ‘C11’, Rev01, dt. 2/4/2011 32
Bansilal Ramnath Agarwal Charitable Trust’s Vishwakarma Institute of Technology, Pune – 411 037 Department of Electronics and Telecommunication Engineering Project and Seminar Subject No/ Sem SM 1 TE I PS 1 Subject Name Subject Code Teaching Scheme (Hrs. per week) Credits Lecture Tutorial Practical Seminar EC37301 0 0 1 2 Project Stage-I EC37302 0 0 1 2 TE II Structure & Syllabus of B.E (E&TC) Program – Pattern ‘C11’, Rev01, dt. 2/4/2011 33
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