RAiO RA8806 - Display Future
RAiO RA8806 - Display Future
RAiO RA8806 - Display Future
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Version 1.3<br />
<strong>RA8806</strong><br />
Two Layers Character/Graphic LCD Controller<br />
6-1-2 Command Write<br />
According to the Table 5-1, <strong>RA8806</strong> accept 4 cycles through MPU interface. If users want to write<br />
command to <strong>RA8806</strong>, then a Command cycle has to execute first, and then execute a Data Write<br />
cycle. The “Command Write” means write function data to register. After these two cycles, the Data<br />
will write into the indicative Register. Please see the following Figure 6-5 (1).<br />
In Table 6-1 of Section 6-1-1, each command of <strong>RA8806</strong> is take 2 cycles, and the minimum cycle<br />
time is 2*tc. So totally the minimum time of command write need 4*tc. See following Table 6-3.<br />
If the secondary cycle is a “Data Read”, then user could read the register content. See the following<br />
Figure 6-5 (2). Note the Figure 6-5 to Figure 6-7 are use the 8080 MPU interface as examples.<br />
RS<br />
ZCS1<br />
ZWR<br />
ZRD<br />
DATA[7:0] REG# DATA<br />
(1) Command Write (Write Data to Register)<br />
RS<br />
ZCS1<br />
ZWR<br />
ZRD<br />
DATA[7:0] REG# DATA<br />
(2) Read Data from Register<br />
Figure 6-5 : Command Write and Register Read Cycle<br />
Table 6-3 : Command Access Time Table<br />
System Clock Command Access Time<br />
4MHz 1µs<br />
6 MHz 667ns<br />
8 MHz 500ns<br />
10 MHz 400ns<br />
12 MHz 333ns<br />
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