RAiO RA8806 - Display Future
RAiO RA8806 - Display Future
RAiO RA8806 - Display Future
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Version 1.3<br />
<strong>RA8806</strong><br />
Two Layers Character/Graphic LCD Controller<br />
6. Function Description<br />
6-1 MPU Interface<br />
6-1-1 MPU Type<br />
The <strong>RA8806</strong> support 8080 or 6800 compatible MPU interface. When the pin “MI” is pull low then the<br />
MPU interface is set to 8080 compatible. If “MI” pulls high then the MPU interface is defined as 6800<br />
compatible. And the pin “DB” is used to select the 8080 MPU data bus is 4-bits or 8-bits. When “DB”<br />
is pulled low, then the data bus for data transition is 4-bits. If pin “DB” pull high, the data transition is<br />
8-bits. The option of 4-bits or 8-bits data bus is for both 8080 and 6800 MPU. Of course, if used 4-<br />
bits interface then the 8080 MPU has to take double time to communicate with <strong>RA8806</strong>. In order to<br />
reduce the transmission line interference between MPU interface and <strong>RA8806</strong>, we suggest that a<br />
small capacitor to the GND should be added at the signal of ZCS1、ZRD、ZWR, please see the<br />
following Figure 6-1.<br />
8080<br />
MPU<br />
<strong>RA8806</strong><br />
A0<br />
RS<br />
A1-A7<br />
IORQ<br />
Decoder<br />
ZCS1<br />
CS2<br />
MI<br />
D0-D3(D0 -D7)<br />
RD<br />
WR<br />
RES<br />
DATA0-3(DATA0-7)<br />
ZRD<br />
ZWR<br />
ZRST<br />
Figure 6-1 : 8080 (4/8-bits) MPU Interface<br />
6800<br />
MPU<br />
<strong>RA8806</strong><br />
VDD<br />
A0<br />
RS<br />
A1-A7<br />
VMA<br />
Decoder<br />
ZCS1<br />
CS2<br />
MI<br />
D0-3(D0-D7)<br />
EN<br />
R/W<br />
RES<br />
DATA0-3(DATA0-7)<br />
EN<br />
ZRW<br />
ZRST<br />
Figure 6-2 : 6800 (4/8-bits) MPU Interface<br />
<strong>RAiO</strong> TECHNOLOGY INC. 27/193 www.raio.com.tw
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