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DATA Acquisition - Instrumentation Devices

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<strong>DATA</strong> ACQUISITION<br />

Reliable <strong>Acquisition</strong><br />

KAM-500 data acquisition is based on a simple and robust concept – the ‘acquisition cycle’. Finite state machines<br />

are implemented on fixed function FPGAs (Field Programmable Gate Arrays), not software dependent<br />

microprocessors. The FPGA is configured to repeatedly perform the same set of actions so that hardware performs<br />

reliably and in a completely deterministic manner– ‘works once, works always’.<br />

<br />

<br />

<br />

No software, stack or microprocessor<br />

No real-time decisions or interrupts<br />

No operating system (no boot up time)<br />

No analog multiplexers =<br />

simultaneous sampling + no crosstalk<br />

The hardware has been designed for reliability<br />

No potentiometers, jumpers or relays<br />

No SIMS (programmable filters)<br />

I 0<br />

I 1<br />

Out<br />

High Performance<br />

The KAM-500’s high performance is achieved using an all-digital backplane with a throughput of up to 64Mbps<br />

(4Msps with 16 bits per sample). The KAM-500 supports hundreds of analog channels in a single, stand-alone chassis.<br />

For distributed systems the number of channels increases to thousands. All analog modules have high data integrity<br />

as<br />

Every analog channel has its own antialiasing filter, instrumentation amp at least 16 bit ADC and<br />

programmable digital filter<br />

Digital filtering is applied using FIR and IIR techniques for a wider choice of sampling rates, more accuracy<br />

and repeatability as well as immunity to temperature drifts<br />

All parameters are sampled independently of transmission<br />

Time correlation of sampled data is straightforward as parameters sampled at the same rate are sampled at<br />

exactly the same point in time<br />

Simultaneous sampling occurs across the complete system in every card in every chassis making it<br />

unnecessary to realign or interpolate samples during analysis<br />

Sel<br />

PSU<br />

Generates +5, +/-12V, +/-7V<br />

Isolated/filtered/ protected<br />

BACKPLANE CONTROLLER<br />

with data encoder<br />

PCM or Ethernet<br />

USER SLOTS<br />

Any module in any slot<br />

3, 6, 9, 13 as standard<br />

DIGITAL BACKPLANE<br />

Synchronous Clock, at 8MHz, Address and Data lines, Read/Write Strobes<br />

3

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