MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Queued Analog-to-Digital Converter (QADC)
Introduction
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Freescale Semiconductor, I
18.2 Introduction
18.10.7 Continuous-Scan Modes . . . . . . . . . . . . . . . . . . . . . . . . . .472
18.10.7.1 Software-Initiated Continuous-Scan Mode. . . . . . . . . . .473
18.10.7.2 External Trigger Continuous-Scan Mode. . . . . . . . . . . .474
18.10.7.3 External Gated Continuous-Scan Mode . . . . . . . . . . . .474
18.10.7.4 Periodic Timer Continuous-Scan Mode . . . . . . . . . . . . .475
18.10.8 QADC Clock (QCLK) Generation . . . . . . . . . . . . . . . . . . . .476
18.10.9 Periodic/Interval Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . .480
18.10.10 Conversion Command Word Table . . . . . . . . . . . . . . . . . .481
18.10.11 Result Word Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .485
18.11 Pin Connection Considerations . . . . . . . . . . . . . . . . . . . . . . .486
18.11.1 Analog Reference Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . .486
18.11.2 Analog Power Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .486
18.11.3 Conversion Timing Schemes . . . . . . . . . . . . . . . . . . . . . . .488
18.11.4 Analog Supply Filtering and Grounding . . . . . . . . . . . . . . .490
18.11.5 Accommodating Positive/Negative Stress Conditions . . . .494
18.11.6 Analog Input Considerations . . . . . . . . . . . . . . . . . . . . . . .495
18.11.7 Analog Input Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .497
18.11.7.1 Settling Time for the External Circuit . . . . . . . . . . . . . . .498
18.11.7.2 Error Resulting from Leakage . . . . . . . . . . . . . . . . . . . .499
18.12 Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500
18.12.1 Interrupt Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500
18.12.2 Interrupt Sources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .501
The queued analog-to-digital converter (QADC) is a 10-bit, unipolar,
successive approximation converter. A minimum of eight analog input
channels can be supported using internal multiplexing. A maximum of 18
input channels can be supported in the expanded, externally multiplexed
mode. The actual number of channels depends upon the number of pins
available to the QADC module.
The QADC consists of an analog front-end and a digital control
subsystem, which includes an IPbus interface block.
The analog section includes input pins, an analog multiplexer, and
sample and hold analog circuits. The analog conversion is performed by
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Queued Analog-to-Digital Converter (QADC) 401
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