MMC2107 - Freescale Semiconductor

Timer Modules (TIM1 and TIM2)
Freescale Semiconductor, Inc.
15.7.1 Timer Input Capture/Output Compare Select Register
Address: TIM1 — 0x00ce_0000
TIM2 — 0x00cf_0000
Bit 7 6 5 4 3 2 1 Bit 0
Read: 0 0 0 0
Write:
IOS3 IOS2 IOS1 IOS0
Reset: 0 0 0 0 0 0 0 0
nc...
Freescale Semiconductor, I
Read: Anytime; always read $00
Write: Anytime
= Writes have no effect and the access terminates without a transfer error exception.
Figure 15-2. Timer Input Capture/Output Compare
Select Register (TIMIOS)
IOS[3:0] — I/O Select Bits
The IOS[3:0] bits enable input capture or output compare operation
for the corresponding timer channels.
1 = Output compare enabled
0 = Input capture enabled
Technical Data MMC2107 – Rev. 2.0
300 Timer Modules (TIM1 and TIM2) MOTOROLA
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