MMC2107 - Freescale Semiconductor

Freescale Semiconductor, Inc.
Non-Volatile Memory FLASH (CMFR)
Functional Description
9.8.5.3 Erasing Shadow Information Words
The shadow information words are erased with either array block 0
depending upon the array configuration. To verify that the shadow
information words are erased with block 0, erase margin reads should
be performed with the SIE bit set in CMFRMCR while the shadow
information is read. For the erase operation to be completed, block 0
must also be fully verified.
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NOTE:
Setting SIE = 1 disables normal array access and should be cleared
after verifying the shadow information.
9.8.6 Erase Pulse Amplitude and Width Modulation
NOTE:
Refer to Table 9-11 for the required erase algorithm to insure reliability
of the FLASH.
The values of PAWS[2:0] and NVR should be updated on the
appropriate pulse to change the erase voltage.
Table 9-11. Required Erase Algorithm
Voltage Step PAWS[2:0] NVR Pulse Width Number of Pulses
–2 V 1 0 0 1 100 ms 1
–3 V 1 0 1 1 100 ms 1
–4 V 1 1 0 1 100 ms 1
–5 V 1 1 1 1 100 ms 1
–6 V 1 0 0 0 100 ms 1
–7 V 1 0 1 0 100 ms 1
–8 V 1 1 0 0 100 ms 1
–9 V 1 1 1 0 100 ms 20
GDB = 0 for all erase operations.
Margin reads are required after the first –9-V pulse.
MMC2107 – Rev. 2.0
Technical Data
MOTOROLA Non-Volatile Memory FLASH (CMFR) 219
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