D. Strukov, UC Santa Barbara

OUTL
LINE
1. HP's memristor and applications
2. Models of resistance switching
3. Volatility speed tradeo
ffs
4. 3D circuit architectures
5. Proposal for evaluation framework

HP’S MEMRISTOR
memristor = memory + resistor
Dmitri Strukov, UCSB
SRC/NSF/A*STAR forum
October 2009
HP’s memristor = TiO 2 resistance change due to oxygen vacancy migration
circuit theory
+
TiO 2 devices
=
HP’s memristor
L.Chua, S.Kang
several groups,
R.S.Williams
T.W.Hickmott first
L .Chua, IEEE Trans. Circuit Theory
18 507 (1971); L.Chua et al. Proc.
IEEE 64 209 (1976)
“pure memristor”
vs.
“memristive”
small subset: T.W.Hickmott JAP 33 2669 (1962); R.Meyer et al. APL
86 112904 (2005); B.J.Choi et al. JAP 98 033715 (2005); C.Yoshida
et al. APL 91 223510 (2007); K.M.Kim et al. APL 91 012907 (2007);
K.Tsunoda et al. APL 90 113501 (2007)
v = R(w) i
dw/dt = i
unipolar/bipolar l RRAM, CBRAM, PCR
RAM etc. are all memristive devices
no simple dynamical model so far for experimental devices
still okay for most applications (using feedback)
applications: memories, FPGAs, electronic synapse, analog circuits (trimming)
just a small biased subset (the&exp) for mem: Baek et al. IEDM (2005); D.Strukov et
al. J. Nanoscience&Nanotechnol. 7 151 (2007); J.Green et al. Nature 445 414 (2007);
S.H.Jo Nano Letters 9 870 (2009); FPGAs: D.Strukov et al. Nanotechnol .16 888 (2005); D.Strukov et al. IEEE Tran.Nanotechnol. 6 696 (2007); Q.Xia et al. Nano Letters
(2009); ANNs: K.Likharev et al. Ann. New York Acad. Sci. 1006 146-163 (2003); G.Snider Nanotechnology 18 365202 (2007); analog: S.Shin et al. Proc. ICCCAS (2009)
starting
point
(t=0)
R
3 >> 2 >> 1
resistance
change
range
R.S.Williams IEEE Spectrum (2008);
J.Yang et al. Nature Nano 3 429 (2008);
D.Strukov et al. Nature 453 80 (2008)
3 0
v = R(w,i,t) i
i= sin[ t]
2
dw/dt = f(w,i,t)
, , )
q
1
0
3 >> 2 >> 1
i-v collapses to straight line at high frequencies for pure memristors
nonlinear i-v with no hysteresis (i.e. at small biases) & nonlinear ionic drift = not a pure memristor
good starting point:
M.Pickett et al. JAP
106 074508 (2009)
J.Borghetti (priv.comm.)
i
t
v

BULK vs INTERFACE BIPOLAR RESIST
TIVE SWITCHING
Dopant N D (x)/N DO
bulk theory
semiconductor with N A fixed
and N D (x) mobile ions
ON: n
w
+ ‐n‐n +
10 ‐1 OFF: n + ‐n‐p‐n n p n
+
10 ‐2
10 ‐3 10 ‐4 10 ‐3 10 ‐2
time t/t 0
N A
D.Strukov et
al. Small 5
1058 (2009)
inte
erface
OFF
ON
Dmitri Strukov, UCSB
SRC/NSF/A*STAR forum
October 2009
ONOFF
I. barrier height/leakage modulation
TO
CMO
e.g. two layer system: R.Meyer et al. Proc. NVMTS (2008)
tial ‐φ/(E G /e)
Poten
0.2
0
Current
v
t
Voltage
0 Length x/L 1
1D model …
but initial
conditions for
3D (i.e. after
forming) are
hard to
simulate…
… and experiment
H.Yang et al.
Nature Mat. 8
585 (2009)
IIa. barrier width/bridging due to radial ion motion
Ag
H 2 O
Pt
Ag
H 2 O
Pt
e.g. in CBRAM: X.Guo et al. APL 91 1 (2007)
chalcogenide electrolytes: M.N.Kozicki
et al. J Non-Crys. Solids 352 567 (2006)
IIb. barrier width/bridging due to vertical ion motion
Co oncentration (log sc cale)
gap profile
Barrier width
1
0.8
0.6
0.4
0.2
grossly simplified picture, mix of all mechanisms in reality…
E=10,1,0.1 MV/cm
10 -8 10 -6 10 -4 10 -2 10 0
time, s
D.Strukov et al. (preliminary data)

WRITE SPEED VS. RETENTION
linear ionic transport
store
~
write
( v 0)
( v V )
I
V
D
nonlinear
effect
due to temperature
and/or electric field
e.g. temperature only:
U A
store
V k T
write
I
V
V
T
U
k T
B store B write
~ ( e e )
V
T
D.Strukov et al. Appl.Phys.A 94 515 (2009)
A
Dmitri Strukov, UCSB
SRC/NSF/A*STAR forum
October 2009
other sources of nonlinearity?
Buttler Volmer reactions
R.Waser et al. Adv.Mat 21
2632 (2009)
Electrochemical effects…
e/ write
store
10 7
10 4 3
10 3
L=100 nm
30 nm
10 nm
3 nm
10 1
ionic
10
A B
conductor
mobile
0.1 0.2
U B (eV)
0.3 0.5
interacting ions
D.Strukov (unpublished)
Joule heating
M.Janousch et al.
Adv.Mat 19 2232
(2007)
XRF map
infrared
curre ent, mA
8
6 1000 K
4
2
0 900 K -2
-4
-2.0 -1.0 0.0 1.0
voltage, V
map
temperature on I-V
perform 3D
coupled
electrothermal
simulations
fit experimental
data using
equivalent
circuit
J.Borghetti
et al.JAP
(2009)
to appear
strong nonlinearity in ionic transport required for high retention, even more for half select
1100 K
TiO 2
(ρ I ,κ I )
OFF state
d OUT
w OFF
d C
metallic
channel
(ρ C ,κ C )
electrode (ρ E ,κ E )
L
v
R C
r
R ON
ON state
extract
geometry
from fitting
z
0
d ON
w ON
D.Strukov et al. MRS (2009)
)
Temperature (K)
Local
mA)
I (
15
10
5
0
290K
140K
3K
INTERMEDIATE
ON
OFF
‐5
‐1.0 ‐0.5 0.0 0.5 1.0
V (V)
600
500
400
300
0
ON
Domain fitted on data
Extrapolation
OFF
10 20
I (mA)
SHORT
30

3D STACKING FOR CMOL CIRCUITS
peripheral
layer addr
ess
word address
read/write
drive
word
line
decoder
layer
decoder
layer
predecoder
Dmitri Strukov, UCSB
SRC/NSF/A*STAR forum
October 2009
d d hybrid
stack of
thin film
crossbar arrays
(m layers)
n
wires
main idea: area + peripheral interface
word line
decoder
switching layers
1 st 2 nd 3 rd
layer decoder
control
lines
layer decoder
layer
predecoder
area distributed
N 4
data
lines
1 st 2 nd
layer layer
just
few examples:
M.-J.Lee IEDM 85 (2008) M.Johnson IEEE J Solid State Circuits 38 1920 (2003)
crossbar
layers
CMOS
layer
tilted crossbar
area interface
2F
2F
N
N
2 N
theory: K.Likharev Interface 14 43 (2005); D.Strukov et al. PNAS (2009)
3 rd
layer
virtual
crossbar
xpoint in 1 st layer
crossbar
wire via
drive/sense
data
xpoint in 2 nd layer
layer
address
D.Strukov
(unpublished)
N 4
via
bit line sense/driver
CMOS layer
xpoint
element
less semi-selected devices for read op.
parallel write for current controlled devices
less maximum current density
… but less dense
D.Strukov (unpublished)
total
..
but
CMOS only CMOS +xbar
(N) 2
only
per
layer
xbar
nanowire
layer 2
switching layer
nanowire
layer 1
CMOS layer
…and exp with just one xbar layer: Q.Xia et al. Nano Letters (2009)

PROPOSAL FOR EVALUATION METRIC
intrinsic
circuit and device tradeoffs
electromigration
issues in wires, smaller
blocks (less dense), and
low throughput smaller
readout margins etc
potentially volatile
device
resistance
low
high
switching
speed
slow
fast
e.g. reset current scaling
thKW
(K/W)
V RESET (V)
V R
0.001 0.01 0.1 1
10
0.01
L=30 nm
1
0.1
3 nm
0.001
c =20 K/W-m (e.g. Ti)
10 4
0.001 0.01R/L
0.1 1
RL
slow RC
likely volatile
and/or large switching
voltages
low endurance,
bad repeatability
e.g. due to higher
electric field and
temperatures
axial
radial
=6 K/W m
(e.g. TiO 2 )
=1 K/W-m
(e.g. SiO 2 )
3 100
=6 K/W-m
1 30
=6 K/W-m
c =20 K/W-m
ΔT =0,
c =0.8-cm
10
0.3 L=3 nm
0.01 0.1
I RESET (mA)
1
D.Strukov
(in preparation)
proposa
al for software
framework
electronic device characterization:
(1) nonlinearity in I-V shape; (2) nonlinearity
in switching; (3) nature of the switching
compliance for reset and set; (4) polarity of
switching; (5) asymmetry of switching
threshold voltages; (6) switching speed; (7)
retention; (8) nominal set/reset voltage/current
values; (9) variations in I-V shape upon
cycling (repeatability); (10) endurance; (11)
device yield; (12) forming step, etc.
design constrains:
density, cost, speed, power
power density, throughput
fabrication consideration:
design rules
s, electromigration specs,
electorode thermal and electrical
resistivity, manufacturing cost
main
goals
Dmitri Strukov, UCSB
SRC/NSF/A*STAR forum
October 2009
material device
characterization
published
device data
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