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MT8206<br />
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE<br />
reference plane to the signals. For the signal integrity issues, the integrate plane would held to<br />
hold a good signal qualities when signal were proceeding on the signal traces. Refer to the Fig.<br />
2-1 Fig. 2-2 below shown the stack up and the topology of the differential signals of the<br />
4-layer PCB where the signals were routed of the outer layers.<br />
� Signals without Guard Traces<br />
Table 2-1.<br />
Fig. 2-1 LVDS Signal Topology – 4 Layers<br />
Variable Nominal (mil) Tolerance Min. (mil) Max. (mil)<br />
Trace High (H) 4.5 (2116)<br />
Trace Width (W) 5 + / - 1 mil 4 6<br />
Spacing (S) 8 (mil) + / - 1 mil 9 7<br />
Single Ended Trace<br />
Impedance<br />
Differential Trace<br />
Impedance<br />
56 61.6 52.6<br />
98 109 89.9<br />
Reference Plane Ground Ground Ground Ground<br />
� Signals with Guard Traces<br />
The other application was used the coplanar ground copper and surrounded the signals to achieve the noise shielding<br />
purpose. Fig. 2-2 below shows the signal topology.<br />
Fig. 2-2 Differential Signal with Guard Trace<br />
June, 2006