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MT8206<br />
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE<br />
� DDR / SDR Interface<br />
The DDR / SDR interface of MT8206G can support varied kinds of DRAM. The ROW bit number is no more than 12; the<br />
column number is 8, 9, or 10bit; and the bank bit is 1/2 bits (2 or 4 banks).<br />
The following is the DRAM support list:<br />
Size DRAM FW/PCB<br />
128MX2 DDR 8MX16X2 Support<br />
128M DDR 8MX16X1 Support<br />
128M DDR 4MX32X1 Support but not ready<br />
128MX2 SDR 8MX16X2 Support<br />
128M SDR 8MX16X1 Support<br />
128M SDR 4MX32X1 Support but not ready<br />
64MX2 SDR 4MX16X2 Support<br />
64M SDR 4MX16X1 Support<br />
64M SDR 2MX32X1 Support but not ready<br />
16MX2 SDR 1MX16X2 Support<br />
16M SDR 1MX16X1 Support<br />
The compatible DRAM types are –5 or –6, and the maximum speed is 175MHz (for ESMT –5 and MOSEL –5).<br />
9. Layout Guide<br />
9.1 PCB LAYER<br />
Board Stack up<br />
FR 4<br />
Outer Layer 0.5 oz<br />
Inner Layer 1.0 oz<br />
Fig. 1-1 PCB Stackup – 4 Layers<br />
The outer layers of the PCB were designated to the mainly signal routings by default, and<br />
normally were chosen to have the 0.5 oz Cu foil with plated 0.5 oz copper, and the inner layers<br />
was designated to be 1.0 oz at the PCB manufacturing step.<br />
P.P<br />
H<br />
June, 2006
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