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MT8206<br />
PRELIMINARY, SUBJECT TO CHANGE WITHOUT NOTICE MTK CONFIDENTIAL, NO DISCLOSURE<br />
Item Symbol Pin # Type Description<br />
3) Monitored pin<br />
2mA, works in stand-by mode<br />
22 UP3_1 B7 I/O<br />
1)<br />
2)<br />
GPIO (default, input in initial state)<br />
UP31<br />
3) Monitored pin<br />
2mA, works in stand-by mode<br />
23 UP3_5 C7 I/O<br />
1)<br />
2)<br />
GPIO (default, input in initial state)<br />
UP35<br />
3) Monitored pin<br />
FCI Interface (3)<br />
2~16mA, SR, PU(optional), PD(optional)<br />
1 FCIDAT T3 I/O 1) GPIO (default, input in initial state)<br />
2) SDIO in ms mode or DAT0 in SD mode<br />
2~16mA, SR<br />
2 FCICLK T1 O 1) GPIO (default, input in initial state)<br />
2) MSCLK in ms mode or SDCLK in SD mode<br />
2~16mA, SR, PU(optional), PD(optional)<br />
3 FCICMD T2 I/O 1) GPIO (default, input in initial state)<br />
2) BS in ms mode or CMD in SD mode<br />
Dram Interface (60)<br />
1 DQ0 AB1 I/O dram data bus bit 0<br />
2 DQ1 AB2 I/O dram data bus bit 1<br />
3 DQ2 AB3 I/O dram data bus bit 2<br />
4 DQ3 AB4 I/O dram data bus bit 3<br />
5 DQ4 AC1 I/O dram data bus bit 4<br />
6 DQ5 AC2 I/O dram data bus bit 5<br />
7 DQ6 AC3 I/O dram data bus bit 6<br />
8 DQ7 AC4 I/O dram data bus bit 7<br />
9 DQ8 AF1 I/O dram data bus bit 8<br />
10 DQ9 AE2 I/O dram data bus bit 9<br />
11 DQ10 AF2 I/O dram data bus bit 10<br />
12 DQ11 AE3 I/O dram data bus bit 11<br />
13 DQ12 AF3 I/O dram data bus bit 12<br />
14 DQ13 AD4 I/O dram data bus bit 13<br />
June, 2006
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