DAC8532: Dual-Channel, Low-Power, 16-Bit, Serial-Input ... - dreamm

More documents

Recommendations

Info

TIMING CHARACTERISTICS (1, 2) V DD = +2.7V to +5.5V; all specifications –40°C to +105°C unless otherwise noted. DAC8532 PARAMETER DESCRIPTION CONDITIONS MIN TYP MAX UNITS t (3) 1 t 2 t 3 t 4 t 5 t 6 t 7 t 8 SCLK Cycle Time SCLK HIGH Time SCLK LOW Time SYNC to SCLK Rising Edge Setup Time Data Setup Time Data Hold Time 24th SCLK Falling Edge to SYNC Rising Edge Minimum SYNC HIGH Time V DD = 2.7V to 3.6V 50 ns V DD = 3.6V to 5.5V 33 ns V DD = 2.7V to 3.6V 13 ns V DD = 3.6V to 5.5V 13 ns V DD = 2.7V to 3.6V 22.5 ns V DD = 3.6V to 5.5V 13 ns V DD = 2.7V to 3.6V 0 ns V DD = 3.6V to 5.5V 0 ns V DD = 2.7V to 3.6V 5 ns V DD = 3.6V to 5.5V 5 ns V DD = 2.7V to 3.6V 4.5 ns V DD = 3.6V to 5.5V 4.5 ns V DD = 2.7V to 3.6V 0 ns V DD = 3.6V to 5.5V 0 ns V DD = 2.7V to 3.6V 50 ns V DD = 3.6V to 5.5V 33 ns t 9 24th SCLK Falling Edge to SYNC Falling Edge V DD = 2.7V to 5.5V 100 ns NOTES: (1) All input signals are specified with t R = t F = 5ns (10% to 90% of V DD ) and timed from a voltage level of (V IL + V IH )/2. (2) See Serial Write Operation timing diagram, below. (3) Maximum SCLK frequency is 30MHz at V DD = +3.6V to +5.5V and 20MHz at V DD = +2.7V to +3.6V. SERIAL WRITE OPERATION t 1 t 6 t 5 t 8 t 2 t 3 t4 t 7 t 9 SCLK 1 24 SYNC D IN DB23 DB0 DB23 4 www.ti.com DAC8532 SBAS246A
TYPICAL CHARACTERISTICS At T A = +25°C, unless otherwise noted. LE (LSB) 64 48 32 16 0 –16 –32 –48 –64 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE V DD = V REF = 5V, T A = 25°C, Channel A Output LE (LSB) 64 48 32 16 0 –16 –32 –48 –64 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE V DD = V REF = 5V, T A = 25°C, Channel B Output DLE (LSB) 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 0000 H 2000 H 4000 H 6000 H 8000 H A000 H C000 H E000 H FFFF H Digital Input Code DLE (LSB) 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 0000 H 2000 H 4000 H 6000 H 8000 H A000 H C000 H E000 H FFFF H Digital Input Code LE (LSB) DLE (LSB) 64 48 32 16 0 –16 –32 –48 –64 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE V DD = V REF = 2.7V, T A = 25°C, Channel A Output 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 0000 H 2000 H 4000 H 6000 H 8000 H A000 H C000 H E000 H FFFF H Digital Input Code LE (LSB) DLE (LSB) 64 48 32 16 0 –16 –32 –48 –64 LINEARITY ERROR AND DIFFERENTIAL LINEARITY ERROR vs CODE V DD = V REF = 2.7V, T A = 25°C, Channel B Output 2.0 1.5 1.0 0.5 0.0 –0.5 –1.0 –1.5 –2.0 0000 H 2000 H 4000 H 6000 H 8000 H A000 H C000 H E000 H FFFF H Digital Input Code Output Error (mV) 25 20 15 10 5 0 –40 ZERO-SCALE ERROR vs TEMPERATURE V DD = V REF V DD = 5V, CH B V DD = 5V, CH A V DD = 2.7V, CH B V DD = 2.7V, CH A –10 20 50 80 105 Temperature (°C) Output Error (mV) 15 10 5 0 –5 –10 –15 –40 FULL-SCALE ERROR vs TEMPERATURE (To avoid clipping of the output signal during the test, V REF = V DD – 10mV) V DD = 2.7V, CH B V DD = 2.7V, CH A V DD = 5V, CH A V DD = 5V, CH B –10 20 50 80 105 Temperature (°C) DAC8532 SBAS246A www.ti.com 5
Page 1 and 2: DAC8532 SBAS246A - DECEMBER 2001 -
Page 3: ELECTRICAL CHARACTERISTICS (Cont.)
Page 7 and 8: TYPICAL CHARACTERISTICS (Cont.) At
Page 9 and 10: TYPICAL CHARACTERISTICS (Cont.) At
Page 11 and 12: INPUT SHIFT REGISTER The input shif
Page 13 and 14: OPERATION EXAMPLES Example 1: Write
Page 15 and 16: DRIVING RESISTIVE AND CAPACITIVE LO
Page 17 and 18: PACKAGE DRAWING DGK (R-PDSO-G8) PLA
Page 20: IMPORTANT NOTICE Texas Instruments

DAC8532: Dual-Channel, Low-Power, 16-Bit, Serial-Input ... - dreamm

Create successful ePaper yourself

Delete template?

Save as template?