Service Guide
Service Guide Service Guide
ST92195B - GENERAL INFORMATION Figure 1. ST92195 Block Diagram Up to 64 Kbytes ROM I/O PORT 0 8 P0[7:0] 256 bytes RAM I/O PORT 2 6 P2[5:0] Up to 8 Kbytes TDSRAM TRI I/O PORT 3 4 P3[7:4] NMI INT[7:4] INT2 INT0 OSCIN OSCOUT RESET RESETO SDO/SDI SCK 256 bytes Register File 8/16-bit CPU MMU Interrupt Management ST9+ CORE RCCU 16-BIT TIMER/ WATCHDOG SPI MEMORY BUS REGISTER BUS I/O PORT 4 I/O PORT 5 DATA SLICER & ACQUI- SITION UNIT SYNC. EXTRAC- TION VPS/WSS DATA SLICER ADC 8 2 P4[7:0] P5[1:0] TXCF CVBS1 WSCR 1 WSCF 1 CVBS2 AIN[4:1] EXTRG MCFM TIMING AND CLOCK CTRL SYNC CONTROL VSYNC HSYNC/CSYNC CSO STOUT VSO[2:1] STANDARD TIMER VOLTAGE SYNTHESIS ON SCREEN DISPLAY PWM D/A CON- VERTER FREQ. PXFM MULTIP. R/G/B/FB TSLU HT PWM[7:0] All alternate functions (Italic characters) are mapped on Ports 0, 2, 3, 4 and 5 1 Not available on all devices. 9/202
ST92195B - GENERAL INFORMATION 1.2 PIN DESCRIPTION Figure 2. 64-Pin Package Pin-Out V DD P0.3 P0.4 P0.5 P0.6 P0.7 RESET P2.0/INT7 P2.1/INT5/AIN1 P2.2/INT0/AIN2 P2.3/INT6/VS01 P2.4/NMI P2.5/AIN3/INT4/VS02 OSCIN OSCOUT V DD GND AIN4/P0.2 P0.1 P0.0 CSO/RESET0/P3.7 P3.6 P3.5 P3.4 B G R FB SDO/SDI/P5.1 INT2/SCK/P5.0 V DD JTDO 1 64 16 32 48 V SS P4.7/PWM7/EXTRG/STOUT P4.6/PWM6 P4.5/PWM5 P4.4/PWM4 P4.3/PWM3/TSLU/HT P4.2/PWM2 P4.1/PWM1 P4.0/PWM0 VSYNC HSYNC/CSYNC AVDD1 PXFM JTRST0 GND N.C. N.C. N.C. *WSCF *VPP/WSCR AVDD3 TEST0 MCFM JTCK TXCF CVBSO AVDD2 JTMS CVBS2 CVBS1 AGND N.C. *See Note 1 of pin description. N.C. = Not connected 10/202
- Page 1 and 2: Service Guide Colour Television CHA
- Page 3 and 4: PRODUCT SAFETY SERVICING GUIDELINES
- Page 5 and 6: SUBJECT : IMPLOSION 1. All direct v
- Page 7 and 8: ! "# " $ " "% $# $# $ && $ '
- Page 9 and 10: 6. GEOMETRY 6.1 VERTICAL CENTER 1)
- Page 11 and 12: ST92195B 32-64K ROM HCMOS MCU WITH
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- Page 19 and 20: ST92195B - GENERAL INFORMATION 1.2.
- Page 21 and 22: ® STV223XD/223X/224X BUS CONTROLLE
- Page 23 and 24: STV223XD/3X/4X Pin N° STV224X/8X S
- Page 25 and 26: STV223XD/3X/4X BLOCK DIAGRAM (STV22
- Page 27 and 28: 2. NO PICTURE Check the wave of I50
- Page 29 and 30: 4. NO COLOR composit video in #26 C
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- Page 33 and 34: % " " '" " " '" % " " '" " " '" %
- Page 35 and 36: % *#+ %%# $ $#'%# % *#+ ! %%
- Page 37 and 38: Mechanical Exploded View 11 1
- Page 39 and 40: Alignment Instructions SVC v0 R BIA
- Page 41 and 42: Electrical Parts List LOC PART CODE
- Page 43: Video Audio
ST92195B - GENERAL INFORMATION<br />
Figure 1. ST92195 Block Diagram<br />
Up to 64<br />
Kbytes ROM<br />
I/O<br />
PORT 0<br />
8<br />
P0[7:0]<br />
256 bytes<br />
RAM<br />
I/O<br />
PORT 2<br />
6<br />
P2[5:0]<br />
Up to 8<br />
Kbytes<br />
TDSRAM TRI<br />
I/O<br />
PORT 3<br />
4<br />
P3[7:4]<br />
NMI<br />
INT[7:4]<br />
INT2<br />
INT0<br />
OSCIN<br />
OSCOUT<br />
RESET<br />
RESETO<br />
SDO/SDI<br />
SCK<br />
256 bytes<br />
Register File<br />
8/16-bit<br />
CPU<br />
MMU<br />
Interrupt<br />
Management<br />
ST9+ CORE<br />
RCCU<br />
16-BIT<br />
TIMER/<br />
WATCHDOG<br />
SPI<br />
MEMORY BUS<br />
REGISTER BUS<br />
I/O<br />
PORT 4<br />
I/O<br />
PORT 5<br />
DATA<br />
SLICER<br />
& ACQUI-<br />
SITION<br />
UNIT<br />
SYNC.<br />
EXTRAC-<br />
TION<br />
VPS/WSS<br />
DATA<br />
SLICER<br />
ADC<br />
8<br />
2<br />
P4[7:0]<br />
P5[1:0]<br />
TXCF<br />
CVBS1<br />
WSCR 1<br />
WSCF 1<br />
CVBS2<br />
AIN[4:1]<br />
EXTRG<br />
MCFM<br />
TIMING AND<br />
CLOCK CTRL<br />
SYNC<br />
CONTROL<br />
VSYNC<br />
HSYNC/CSYNC<br />
CSO<br />
STOUT<br />
VSO[2:1]<br />
STANDARD<br />
TIMER<br />
VOLTAGE<br />
SYNTHESIS<br />
ON<br />
SCREEN<br />
DISPLAY<br />
PWM<br />
D/A CON-<br />
VERTER<br />
FREQ.<br />
PXFM<br />
MULTIP.<br />
R/G/B/FB<br />
TSLU<br />
HT<br />
PWM[7:0]<br />
All alternate functions (Italic characters) are mapped on Ports 0, 2, 3, 4 and 5<br />
1 Not available on all devices.<br />
9/202