Specification of RTRM08 Transceiver Module Easywave I2C - ELDAT

Specification
Index 1.01
Project No.
RF-Products, Controller RTRM08 Transceiver Module Easw I 2 C Page 5
Development
Production S. Schreiber 2007-08-24
Pin number Signal name Signal direction Description
1 VCC - Power supply (2.1 V ...5.25 V).
2 GND - Ground.
3 / RESET in Reset. Active low.
4 SDA bidirectional (open-drain) I 2 C serial data I/O.
5 SCL bidirectional (open-drain) I 2 C synchronous serial clock I/O.
6 / REQ out (open-drain) Request output. It indicates whether an
Easywave telegram could be received and
whether a received Easywave telegram is
over. Active low.
7 - 12 (NC) - Pins are not allowed to connect to any circuit.
There are options for the antenna available, for example, coaxial connectors or an antenna via the module's
connector. Please contact ELDAT.
2.2 Power up and Reset
The module's / RESET signal is not allowed to be high until the power supply is in the operational range. The
module is in inactive state subsequently; it can be controlled via the I 2 C-bus.
The / REQ output of the module goes to (active) low until the module's rx mode is altered.
The module also can be reset at any time independent from its former state by asserting the / RESET signal.
2.3 I 2 C-bus
The SCL and the SDA pin are the I 2 C-bus as defined in the “THE I 2 C-BUS SPECIFICATION VERSION 2.1“
(January 2000), document order number 9398 393 40011 by Philips.
A short discussion of the I 2 C-bus follows in this section. If both this specification of the RTRM08 transceiver
module and the referred “THE I 2 C-BUS SPECIFICATION VERSION 2.1“ document define a specific detail,
the specification of the RTRM08 transceiver module has informational characteristics only.
The I 2 C clock rate of the transceiver module can be up to 100 kHz (Standard Mode).
Signal Lines of the I 2 C-bus
The I 2 C-bus is a 2-wire bus; it has a bidirectional serial clock line SCL and a bidirectional serial data line SDA.
Both SCL and SDA are combined inputs and open-drain outputs. There must be one pullup-resistor on each
of the SCL and the SDA line. The RTRM08 transceiver module I 2 C PHY does not include these pullupresistors.
A device connected to a bus can be either a master or a slave. A master device is able to acquire the I 2 C-bus
and initiate a transfer from (read) or to (write) a specified slave. The master generates the clock on the SCL
line in order to transfer the serial data bits. The slave can slow down the transfer if it can't transmit or receive
data bytes fast enough (clock stretching, see below). The master has to terminate the transfer and release
the I 2 C-bus either successfully or due to a fail.
The SDA line is driven by the device which transmits data bits: it is either a master or a slave.
One or more master devices can be connected to the I 2 C-bus. This specification covers examples with one
master only, but the transceiver module also works on I 2 C-busses with more than one master (multi-master).
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