Specification of RTRM08 Transceiver Module Easywave I2C - ELDAT

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Specification Index 1.01 Project No. RF-Products, Controller RTRM08 Transceiver Module Easw I 2 C Page 12 Development Production S. Schreiber 2007-08-24 addressing a slave (high part of address) addressing a slave (low part of address) 2-bit 0 0 8-bit 0 free S 11110 address RW A+ Sr address A+ write transfer 8-bit 0 8-bit 0/1 data byte A+ data byte A addressing the slave for read transfer (high part of address) 2-bit 1 0 8-bit 0 8-bit 1 Sr 11110 address RW A+ data byte A+ data byte A- P free from master to slave from slave to master read transfer Figure 8 Combined write and read transfer using a 10-bit address Accessing the Transceiver Module S start condition Sr repeated start condition RW R/W direction bit A+ acknowledge-bit (SDA line is low) A- acknowledge-bit (SDA line is high) A acknowledge-bit (SDA line is low or high) P stop condition The transceiver module is a slave and has a fixed I 2 C address (7-bit), which is 1100010 (binary, excluding the R/W-bit). Other fixed I 2 C addresses (7-bit or 10-bit) are available on request. The module holds all information in registers which can be written or read via the I 2 C-interface. Each register is 8 bits wide (one byte) and has a specific register address. The register address also is 8 bits wide. The module maintains a register address pointer, which contains the register address of the register that is written or read at next. When a master does a write transfer to the transceiver module, the module takes the first data byte of the transfer as desired register address: it initializes its register address pointer with the transferred data byte (Figure 9). Each subsequently transferred data byte is written into the register which the current register address pointer specifies. The register address pointer is incremented by one after each write, so the next transferred data byte is written into the next register. When a master does a read transfer from the transceiver module, each data byte is read out of the register 7007
Specification Index 1.01 Project No. RF-Products, Controller RTRM08 Transceiver Module Easw I 2 C Page 13 Development Production S. Schreiber 2007-08-24 which the current register address pointer specifies (Figure 10). The register address pointer is incremented by one after each read, so the next transferred data byte is read out of the next register. addressing the module for write transfer write transfers free slave address data byte data byte data byte data byte ... free register address a from master to module data for register with the register address a Figure 9 Writing into registers of the transceiver module data for register with the register address a+1 data for register with the register address a+2 The master can specify a register address with a write transfer of one data byte only: it is the register address. A subsequent read transfer will read out data; it will start with the specified register address (Figure 10). addressing the module for write transfer free slave address data byte addressing the module for read transfer slave address from master to module from module to master write transfer register address a data byte data byte data byte data byte ... free data from register with the register address a data from register with the register address a+1 Figure 10 Reading out registers of the transceiver module read transfers data from register with the register address a+2 data from register with the register address a+3 ... ... 7007
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Specification of RTRM08 Transceiver Module Easywave I2C - ELDAT

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