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PDF (double-sided) - Physics Department, UCSB - University of ...

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a readout line. These two lines are identical up to room temperature where the<br />

readout line goes into the PreAmp card (see Section 6.3.6) and the bias line goes<br />

through a 10:1 divider/low-pass filter to a FastBias card (see Section 6.3.5).<br />

The flux bias line <strong>of</strong> the qubit is split right outside the sample box into an<br />

RF and a DC part by a “Bias-T”. The RF part simply passes straight through<br />

the bias-T into a 20 dB attenuator, while the DC part passes through a shunted<br />

inductor coil to a copper powder filter.<br />

For noise reasons, these components<br />

are again all located at 25 mK.<br />

Up the bias lines at 4 K, the RF part passes<br />

through another 20 dB attenuator and then straight to room temperature. The<br />

total attenuation <strong>of</strong> 40 dB is split between the two temperature stages to balance<br />

the heat load on the refrigerator with the noise generated. The DC line passes<br />

through an RC low pass filter network at 4 K and terminates at room temperature<br />

at another FastBias card.<br />

6.3.5 FastBias Card<br />

All DC (< 100 kHz) biasing is done via custom designed digitally controlled<br />

voltage sources we call the “FastBias” cards.<br />

They consist <strong>of</strong> low-noise 16-bit<br />

digital-to-analog converters (DACs) that are controlled by an FPGA which receives<br />

binary commands serially through a fiber-optic cable. The FPGA is programmed<br />

to turn <strong>of</strong>f the card’s clock source whenever it is not receiving or pro-<br />

117

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