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quality of the film deposited in this step is of crucial importance for the final
performance of the devices. Since many parameters (deposition temperature, gas
pressure, plasma intensity, etc.) contribute to this film quality, a lot of material
science and engineering has to be invested into the optimization of this step. The
fact that the PECVD system used here is shared between many users from different
groups using very different materials further complicates this optimization since
the different recipes leave behind a constantly changing chemical environment
in the deposition chamber. Extensive cleaning and chamber conditioning before
each deposition is therefore required to achieve the needed film qualities. The bulk
quality of the film also needs to be balanced with other physical requirements like
the internal stress of the film and its adhesion to the base wiring layer as well as
the sapphire substrate.
5.4.2 Via Cut
Next, the above described lithography – ICP etch – strip process is used to cut
holes (vias) into the insulator layer in the locations where the traces in the base
wiring layer need to be contacted by the top wiring layer. The recipe used for the
etching is based on SF 6 gas, which removes amorphous silicon, but not aluminum
or aluminum oxide.
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