PDF (double-sided) - Physics Department, UCSB - University of ...
PDF (double-sided) - Physics Department, UCSB - University of ... PDF (double-sided) - Physics Department, UCSB - University of ...
4.2.1 Qubit When designing the inductor of the qubit it is important to reduce the circuit’s sensitivity to any potentially fluctuating external background magnetic fields. This can be achieved to first order by arranging the inductor into a symmetric figure-8 configuration. With this, any current induced in one of the loops by a background field is exactly cancelled by the current induced in the other loop. This makes the qubit sensitive only to gradients in magnetic fields and is therefore also called a gradiometer design. The actual shape of the inductor is best designed with modeling software. A very powerful free tool that serves this purpose well is FastHenry. It allows for the specification of traces of given dimensions and will then calculate the resulting inductance of all connected traces and all mutual inductances between different sets of connected traces. Again, the design allows for a lot of flexibility in the choices of exact parameters but there are a few concerns to keep in mind. The width of traces used in the design should be large enough to yield reproducible results during fabrication, but not too large to avoid trapping magnetic flux vortices. A good size here seems 2 µm. The number of turns in the inductor needs to be balanced between the overall size of the structure and the added capacitance due to the needed crossovers. Two turns here seem to be a good number. 82
The geometry of the qubit junction is a lot more strictly defined. It needs to be as small as possible since even a single materials defect in the junction couples strongly to the qubit and thus needs to be avoided. On the other hand it cannot be so small as to not yield reliable fabrication results. Also, since the junction’s oxide thickness is somewhat irreproducible, it is useful to generate an array of junctions on the wafer with slightly different areas to guarantee that some dies on the wafer will yield the desired critical current. A design with 2 µm 2 wedge-shaped junctions, all oriented in the same direction so that they can be pass-shifted together, works well. The requirement that the junction needs to be as small as possible does not allow for its capacitance to be large enough to reach the needed value. This can be easily remedied with an external shunting capacitor. This capacitor can be implemented with a trivial parallel-plate design. Its geometry is chosen using the relations: C = C ext + C junc (4.5) C ext = ε A d (4.6) When choosing A versus d, the only concerns are the reliability of fabrication and the size of the final structure. 83
- Page 59 and 60: Figure 2.5: Example Qubit Coupling
- Page 61 and 62: Readout schemes can further be cate
- Page 63: states in the qubit’s inductor, t
- Page 66 and 67: at time t. r is not restricted to b
- Page 68 and 69: 3.1.2 Effects of a Time Dependent P
- Page 70 and 71: In some cases, it is possible to so
- Page 72 and 73: Figure 3.1: Examples of Numerical S
- Page 74 and 75: • The energy difference between t
- Page 76 and 77: like this: V = ( V (−1, −1), V
- Page 78 and 79: Figure 3.2: Simulation of LC Oscill
- Page 80 and 81: Table 3.1: Transition Matrix Elemen
- Page 82 and 83: with ω mn = Em−En . Multiplying
- Page 84 and 85: α, it can be ignored. Thus, the in
- Page 86 and 87: e solved exactly: A(t + ∆t) = e
- Page 88 and 89: qubits would be simulated using: A(
- Page 90 and 91: This calculation assumes that the s
- Page 92 and 93: Decoherence consists of two parts:
- Page 94 and 95: Note the difference in signs of the
- Page 97 and 98: Chapter 4 Designing the Phase Qubit
- Page 99 and 100: mutual inductance between the qubit
- Page 101 and 102: During the measurement, the | 1 〉
- Page 103 and 104: the right impedance transformation
- Page 105 and 106: excitations. Since these are a pote
- Page 107 and 108: Figure 4.3: Squid I/V Traces - a) L
- Page 109: Figure 4.5: Qubit Integrated Circui
- Page 113 and 114: squid loop. Thus, this tool can be
- Page 115: now, amorphous silicon seems to pro
- Page 118 and 119: Figure 5.1: L-Edit Mask Layout Tool
- Page 120 and 121: Figure 5.2: Fabrication Building Bl
- Page 122 and 123: Figure 5.3: Photolithography and Et
- Page 124 and 125: times the removal can be a bit tric
- Page 126 and 127: Figure 5.4: Clearing Vias from Nati
- Page 128 and 129: 5.6 Junction Layers 5.6.1 Oxidation
- Page 130 and 131: top wiring layer to protect all low
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- Page 138 and 139: Figure 6.1: 4-Wire Measurement - a)
- Page 140 and 141: 6.3 Quantum Measurements at 25 mK 6
- Page 142 and 143: seems to be a box machined out of s
- Page 144 and 145: Figure 6.2: Dilution Refrigerator W
- Page 146 and 147: cessing data. This protects the vol
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- Page 156 and 157: 7.2.4 Performance Last, but certain
- Page 158 and 159: or a Client Module. Client Modules
The geometry <strong>of</strong> the qubit junction is a lot more strictly defined. It needs<br />
to be as small as possible since even a single materials defect in the junction<br />
couples strongly to the qubit and thus needs to be avoided. On the other hand<br />
it cannot be so small as to not yield reliable fabrication results. Also, since the<br />
junction’s oxide thickness is somewhat irreproducible, it is useful to generate an<br />
array <strong>of</strong> junctions on the wafer with slightly different areas to guarantee that<br />
some dies on the wafer will yield the desired critical current. A design with 2 µm 2<br />
wedge-shaped junctions, all oriented in the same direction so that they can be<br />
pass-shifted together, works well.<br />
The requirement that the junction needs to be as small as possible does not<br />
allow for its capacitance to be large enough to reach the needed value. This can<br />
be easily remedied with an external shunting capacitor. This capacitor can be<br />
implemented with a trivial parallel-plate design. Its geometry is chosen using the<br />
relations:<br />
C = C ext + C junc (4.5)<br />
C ext = ε A d<br />
(4.6)<br />
When choosing A versus d, the only concerns are the reliability <strong>of</strong> fabrication and<br />
the size <strong>of</strong> the final structure.<br />
83
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