Intel® Sort-Interface-Unit (SIU) Design Methods for Reducing Burn ...
Intel® Sort-Interface-Unit (SIU) Design Methods for Reducing Burn ...
Intel® Sort-Interface-Unit (SIU) Design Methods for Reducing Burn ...
Create successful ePaper yourself
Turn your PDF publications into a flip-book with our unique Google optimized e-Paper software.
Intel® <strong>Sort</strong>-<strong>Interface</strong><br />
<strong>Interface</strong>-<strong>Unit</strong> (<strong>SIU</strong>)<br />
<strong>Design</strong> <strong>Methods</strong> <strong>for</strong> <strong>Reducing</strong><br />
<strong>Burn</strong> Rates on Tight-Pitch C4<br />
Logic Arrays<br />
Kip Stevenson and Pooya Tadayon<br />
Intel Corporation<br />
<strong>Sort</strong> Test Technology Development<br />
June 2002
Problem Statement<br />
! Logic Test Challenge: Reduce or<br />
maintain test cost in the face of<br />
aggressive technological scaling <strong>for</strong><br />
increased power and reduced array bump<br />
pitch.<br />
! Increased Power Density<br />
! Increased Probe Density<br />
! Increased Failure Modes<br />
! Probe burning<br />
! Probe-to<br />
to-Probe shorting<br />
! Die defects<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
2
<strong>SIU</strong> Cost and <strong>Burn</strong> Trends<br />
1<br />
Relative <strong>SIU</strong> Cost or <strong>Burn</strong>s<br />
0.8<br />
0.6<br />
0.4<br />
0.2<br />
0<br />
240<br />
220<br />
200<br />
180<br />
160<br />
<strong>SIU</strong> <strong>Burn</strong>s<br />
<strong>SIU</strong> Cost<br />
Pitch (um)<br />
! <strong>Burn</strong> Rate translates into Higher Cost of<br />
Ownership due to:<br />
! Increased early lifetime <strong>SIU</strong> failures<br />
! Larger <strong>SIU</strong> inventories on reserve<br />
! Reduced Test Capacity due to slower TPT<br />
! Increased potential <strong>for</strong> DUT damage<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
3
<strong>SIU</strong> <strong>Burn</strong>s - Examples<br />
<strong>Burn</strong><br />
Type<br />
I:<br />
Massive<br />
<strong>Burn</strong><br />
II:<br />
Bridging<br />
III:<br />
Bump<br />
Pick-up<br />
No.<br />
Probes<br />
affected<br />
> 3<br />
2-3<br />
1<br />
Process Impact<br />
Catastrophic burn,<br />
Probing Stopped, <strong>SIU</strong><br />
repair difficult / impossible<br />
Large size, Probing<br />
Stopped, <strong>SIU</strong> repair /<br />
cleaning needed<br />
Material stuck on probe,<br />
Probing may / may not<br />
need to be stopped, <strong>SIU</strong><br />
easy to repair<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
4
<strong>SIU</strong> <strong>Burn</strong> Rate Reduction Proposal<br />
1<br />
Relative <strong>SIU</strong> Cost or <strong>Burn</strong>s<br />
0.8<br />
0.6<br />
0.4<br />
0.2<br />
0<br />
240<br />
220<br />
200<br />
180<br />
160<br />
<strong>SIU</strong> <strong>Burn</strong>s<br />
<strong>SIU</strong> Bruns (Depop)<br />
<strong>SIU</strong> Cost<br />
<strong>SIU</strong> Cost (Depop)<br />
Pitch (um)<br />
! Power/Ground Probe Depopulation has<br />
tremendous potential to maintain cost while<br />
reducing burn rate:<br />
! Models predicts ~ 10x Lower <strong>Burn</strong> Rate<br />
! <strong>SIU</strong> unit cost decreased<br />
! Smaller <strong>SIU</strong> inventory needed<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
5
Intel® Depopulation <strong>Design</strong> Rules<br />
! Use selective depopulation of Pwr/Gnd array to<br />
increase the spacing between probes.<br />
! Pros:<br />
! Cons:<br />
! Reduce likelihood probe-to<br />
to-probe bridging<br />
! Reduce impact of bump defects<br />
! Increased current / probe<br />
! Test per<strong>for</strong>mance impact<br />
! Depopulation aims to strike a balance between<br />
burn rate reduction and per<strong>for</strong>mance impact<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
6
Intel® Depopulation Scheme<br />
! Min Spacing<br />
! Adjacent pwr/gnds within a minimum radius<br />
(R_min) should not be probed.<br />
! Uni<strong>for</strong>mly Depopulate Pwr/Gnd<br />
! lower but balanced mechanical <strong>for</strong>ce<br />
! 1:X “Odd” Depop Rules<br />
! 1:3, 1:5, 2:5, 3:5, … Row or Column<br />
! 1:3, 1:5, … with in Row or Column w/ offset<br />
! Sequential 1:X Combinations<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
7
Depopulation Examples<br />
1:X Row ( or Column )<br />
1:3<br />
Code:<br />
Power<br />
Ground<br />
1:5<br />
<strong>Sort</strong> Test Technology Development<br />
June 2002<br />
8
Depopulation Examples<br />
1:X within Row w offset<br />
1:3<br />
Code:<br />
Power<br />
Ground<br />
1:5<br />
<strong>Sort</strong> Test Technology Development<br />
June 2002<br />
9
Depopulation Examples<br />
1:X Sequential Combination<br />
1:3<br />
Row<br />
Code:<br />
Power<br />
1:3<br />
w/<br />
offset<br />
Ground<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
10
Concerns / Considerations<br />
! Probing Force<br />
! Use uni<strong>for</strong>m depop to prevent regions of high<br />
mechanical / electrical stress.<br />
! Current / Probe<br />
! Max Current Probe Rating requires Minimum<br />
Number of Probes: (N_min = X* Max_I + m)<br />
! Power Delivery<br />
! Vcc Droop = F(N, I_step, …)<br />
! Test Per<strong>for</strong>mance<br />
! Test Yield, Test Time, Device Parametrics<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
11
Power Delivery / Per<strong>for</strong>mance<br />
Impact<br />
! “Product A” -- Vdroop vs. Depopulation<br />
! Measured Vdroop / Test Yield <strong>for</strong><br />
successively depop’d <strong>SIU</strong>.<br />
! Removed ~ 16% probes / stage<br />
! “Product B” -- Pilot<br />
! Head-to<br />
to-Head <strong>Sort</strong> Comparison <strong>for</strong> POR<br />
(uni<strong>for</strong>m) vs. 1:3 Depop <strong>Design</strong>s<br />
! “Product C” -- Pilot<br />
! Head-to<br />
to-Head <strong>Sort</strong> Comparison <strong>for</strong> POR<br />
(non-uni<strong>for</strong>m) vs. 1:3 Depop <strong>Design</strong>s<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
12
Intel® “Product A” – Vdroop vs.<br />
Depop<br />
Vdroop Increases<br />
w/ Current Step +<br />
Depopulation<br />
No statistically<br />
significant differences<br />
in Test Yield, Test Time,<br />
Device Parametrics<br />
Depopulation up to ~50%<br />
still acceptably within<br />
<strong>Design</strong> Goals <strong>for</strong><br />
Per<strong>for</strong>mance<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
13
Intel® “Product B” / “Product C” –<br />
Pilot Results<br />
! Depop <strong>SIU</strong> per<strong>for</strong>med equal to / better than POR<br />
<strong>SIU</strong> <strong>for</strong> Yield, Test Time, Leakage, <strong>Burn</strong> Rate<br />
! Depop <strong>SIU</strong> had Max Frequency differences but<br />
no additional Frequency variation or noise<br />
! Front-End to Back-End <strong>Unit</strong> Correlation Unaffected<br />
Product<br />
Yield<br />
LKG<br />
Fmax<br />
change<br />
Vmin<br />
Test<br />
Time<br />
<strong>Burn</strong> Rate<br />
“Product B”<br />
“Product C”<br />
NC<br />
NC<br />
NC<br />
NC<br />
- 3.4%<br />
+ 4 %<br />
NC<br />
NC<br />
NC<br />
NC<br />
POR=3<br />
Depop=0<br />
Type I, II<br />
lower<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
14
Summary<br />
! Increasing trend in <strong>SIU</strong> <strong>Burn</strong> Rate due to increased<br />
power and reduced bump pitch poses tremendous test<br />
challenge.<br />
! Selective Depopulation enables significant burn rate<br />
reduction at reduced cost w/ some potential impact to<br />
test per<strong>for</strong>mance.<br />
! Power Delivery / <strong>Burn</strong> Rate tradeoffs must be<br />
balanced.<br />
! Uni<strong>for</strong>m Depopulation can be achieved w/ simple 1:X<br />
rules.<br />
! Intel® results demonstrate significant burn rate<br />
reduction w/ limited or no statistically significant<br />
reduction in test per<strong>for</strong>mance.<br />
June 2002<br />
<strong>Sort</strong> Test Technology Development<br />
15
Change language