with Pyramid Probe Cards - Semiconductor Wafer Test Workshop
with Pyramid Probe Cards - Semiconductor Wafer Test Workshop
with Pyramid Probe Cards - Semiconductor Wafer Test Workshop
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Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Production <strong>Test</strong> of Process<br />
Control Monitors (PCMs) <strong>with</strong><br />
<strong>Pyramid</strong> <strong>Probe</strong> <strong>Cards</strong><br />
Ken Smith, Cascade Microtech<br />
Bill Knauer, Keithley Instruments<br />
Dr. Jerry Broz, Jason Aronoff, Texas Instruments
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Goal of Presentation<br />
• Communicate a joint evaluation effort<br />
between Texas Instruments, Keithley<br />
Instruments and Cascade Microtech<br />
investigating the use of <strong>Pyramid</strong> <strong>Probe</strong>s for<br />
probing process monitors <strong>with</strong> copper pads<br />
meeting the shrinking requirements of<br />
smaller scribelines.
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Abstract:<br />
Process monitors are used extensively in semiconductor fabs<br />
to optimize yields, provide process control feedback, and<br />
assure device quality. The scribelines or streets used for<br />
PCMs are under the same unrelenting density pressure as<br />
IC lithography. Reducing the scribeline by 50 microns on<br />
a 5 mm square die, for example, results in a net reduction<br />
in area and cost of 2%. This can provide a huge ROI for<br />
large wafer fabs. <strong>Wafer</strong> saw and blade manufacturers are<br />
continously reducing saw kerf requirements and PCM pad<br />
size is becoming a limiting factor in realizing this<br />
competitive advantage. This paper presents DC<br />
parametric performance measurements in the femtoamp /<br />
femtofarad range for semiconductor test structures <strong>with</strong><br />
<strong>Pyramid</strong> <strong>Probe</strong>s. Results will include probing both normal<br />
aluminum pads and copper pads. Contact resistance,<br />
probe pad damage, multiple probe cycles and probe life<br />
time results for both pad materials are also discussed.
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Outline:<br />
• DC Parametric requirements<br />
• Design approach<br />
• Electrical performance<br />
• Contact resistance performance<br />
• <strong>Probe</strong> mark budget<br />
• Conclusion
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
DC Parametric Requirements<br />
• General application is for monitoring test<br />
key leakage and capacitance<br />
• Typical production requirements<br />
– 1-2 pA, 1-2 pF measurements<br />
–0.1 pA, 0.1 pF parasitics<br />
• Leading edge engineering requirements<br />
– 10-50 fA measurements<br />
–1-10 fA parasitics<br />
• <strong>Probe</strong> pads shrinking to meet scribe line<br />
shrinks<br />
– 60-70 um typical today >> 50-40 asap
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Design Approach<br />
• For reference, a typical functional test spec<br />
is 10 nA/volt<br />
– Doesn’t require guards (100 megohm)<br />
• Guards required below 1 nA (1 gigohm)<br />
– milli, micro, nano, pico, femto<br />
– Typical of parametric test equipment<br />
– Guard theory: The guard is driven by a<br />
separate amplifier to the same voltage<br />
as the test pin to reduce current flow to<br />
external conductors
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
<strong>Pyramid</strong> <strong>Probe</strong> Card <strong>with</strong><br />
Keithley S600 Interface<br />
• Coax forcesense<br />
guard<br />
• Twinax routed<br />
cables to lower<br />
board<br />
• Guarded traces<br />
on lower board
SWTW 2002: Parametric test<br />
<strong>Pyramid</strong> Core for Parametric <strong>Test</strong><br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
• Guarded circuit board interface<br />
• Guarded traces to probe tips
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
<strong>Pyramid</strong> Card Looking Down<br />
Through Core<br />
• Linear layout typical of scribe line PCMs<br />
• Guarded traces to probe tips (100 um pitch)<br />
• Staggered routing for fine guard pitch
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Link to Keithley Electrical<br />
Performance Report<br />
• Please see Bill Knauer’s presentation<br />
Knauer_SWTW2002.ppt for his original<br />
slides in Keithley format
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Electrical Characterization<br />
Of <strong>Pyramid</strong> <strong>Probe</strong> Card<br />
• Leakage / Settling Time Measurements<br />
• Noise and Offset Measurements<br />
• Capacitance Measurements
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Leakage / Settling Comparison<br />
• Initial settling curve is the same as the blade and coax<br />
epoxy cards.<br />
• Longer final settling due to slightly higher leakage and<br />
higher dielectric absorption.<br />
5.00E-13<br />
10V 100pA Range 1plc <strong>Probe</strong> Card<br />
Current<br />
4.50E-13<br />
4.00E-13<br />
3.50E-13<br />
3.00E-13<br />
2.50E-13<br />
2.00E-13<br />
1.50E-13<br />
1.00E-13<br />
5.00E-14<br />
0.00E+00<br />
Blade Card<br />
Coax Epoxy<br />
<strong>Pyramid</strong><br />
0.00<br />
1.36<br />
2.71<br />
4.06<br />
5.46<br />
6.81<br />
8.16<br />
9.52<br />
10.87<br />
12.23<br />
13.58<br />
14.93<br />
16.29<br />
17.64<br />
18.99<br />
20.39<br />
21.74<br />
Time
SWTW 2002: Parametric test<br />
Noise and Offset Comparison<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
• Peak to peak noise and standard deviation of<br />
noise is same as other cards.<br />
• Mean is slightly higher because of leakage.<br />
10V 100pA Range 1plc<br />
5.00E-14<br />
4.50E-14<br />
4.51E-14<br />
4.00E-14<br />
3.50E-14<br />
Current<br />
3.00E-14<br />
2.50E-14<br />
2.00E-14<br />
2.05E-14<br />
2.61E-14<br />
2.34E-14<br />
2.59E-14<br />
2.15E-14<br />
P To P<br />
Stddev<br />
Mean<br />
1.50E-14<br />
1.00E-14<br />
5.00E-15<br />
3.52037E-15<br />
5.21966E-15<br />
3.99263E-15<br />
0.00E+00<br />
Blade Card Coax Epoxy <strong>Pyramid</strong>
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Capacitance Comparison<br />
• Capacitance is the same as other probe cards<br />
Capacitance Measurement<br />
Capacitance<br />
6.00E-13<br />
5.00E-13<br />
4.00E-13<br />
3.00E-13<br />
2.00E-13<br />
1.00E-13<br />
0.00E+00<br />
-1.00E-13<br />
-2.00E-13<br />
-3.00E-13<br />
Blade Card<br />
Coax Epoxy<br />
PYRAMID<br />
13 - 10<br />
20 - 1<br />
18 - 7<br />
6 - 2<br />
4 - 1<br />
20 - 19<br />
13 - 12<br />
8 - 7<br />
4 - 3<br />
3 - 2<br />
D.U.T. Pins
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Characterization Conclusions<br />
• <strong>Pyramid</strong> probe card design shows<br />
excellent performance for low current<br />
measurements down to 100fA as<br />
compared to other low current<br />
technologies.<br />
• Increased settling related to dielectric<br />
absorption and not capacitance.<br />
• <strong>Probe</strong>s up offset measurements will allow<br />
card to perform as well as other low current<br />
technologies.
SWTW 2002: Parametric test<br />
Contact Resistance <strong>Test</strong> Conditions<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
• Loop resistance between each of 20 adjacent channels<br />
• 13000 cycles, measure every 20 cycles, no cleaning cycles<br />
• 17 particle hits: class 10K environment (shown as 50 ohms)<br />
• Room temperature<br />
60<br />
Core A1 on Blanket Copper FT + 140 um<br />
50<br />
CRES (Ohms)<br />
40<br />
30<br />
20<br />
10<br />
0<br />
0 2000 4000 6000 8000 10000 12000 14000<br />
touchdowns
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Cres <strong>with</strong> Low Overtravel on<br />
Oxidized Copper <strong>Wafer</strong><br />
• Relationship between overtravel, Cres, and<br />
copper oxidation time under investigation<br />
Core A3 after IPA FT + 125 um OT (run 5/17)<br />
60<br />
50<br />
CRES (Ohms)<br />
40<br />
30<br />
20<br />
10<br />
0<br />
0 2000 4000 6000 8000 10000 12000 14000 16000 18000 20000<br />
touchdowns
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Contact Resistance Performance<br />
on clean Copper wafers<br />
• Loop resistance: 1.14 to 1.27 ohms<br />
• Cres average: 0.091 ohms<br />
• Cres std dev: 0.032 ohms<br />
2<br />
Core A1 on Blanket Copper FT + 140 um<br />
CRES (Ohms)<br />
1<br />
0<br />
0 2000 4000 6000 8000 10000 12000 14000<br />
touchdowns
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
<strong>Probe</strong> Mark Budget<br />
• Maximum mark size 15 x 20 um<br />
• Positional accuracy +/- 5 um<br />
• Mark budget 25 x 30 um<br />
• Typical marks on 30 x 50 um pads
SWTW 2002: Parametric test<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Conclusion:<br />
• <strong>Pyramid</strong> <strong>Probe</strong> <strong>Cards</strong> show excellent<br />
performance for low current measurements<br />
on Aluminum or Copper pads
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Production <strong>Test</strong> of Process<br />
Control Monitors (PCMs) <strong>with</strong><br />
<strong>Pyramid</strong> <strong>Probe</strong> <strong>Cards</strong><br />
Ken Smith, Cascade Microtech<br />
Bill Knauer, Keithley Instruments<br />
Dr. Jerry Broz, Jason Aronoff, Texas Instruments
SWTW 2002: Parametric test<br />
KGD <strong>Workshop</strong> Commercial:<br />
Innovating <strong>Test</strong><br />
Technologies<br />
for production<br />
probe cards<br />
Flip Chip KGD <strong>Workshop</strong><br />
June 24-26 Austin, Texas<br />
IMAPS www.imapsflipchip.com<br />
<strong>Pyramid</strong> <strong>Probe</strong> high volume solder ball<br />
probing results for Known-Good-Die