Design Of Digital Circuits - Dharmsinh Desai University
Design Of Digital Circuits - Dharmsinh Desai University Design Of Digital Circuits - Dharmsinh Desai University
Design Of Digital Circuits Lab Manual 3.4 Testing the Solution 4 Conclusions All the truth tables are verified. Department of Information Technology, Faculty of Technology, D. D. University, Nadiad. 11
Design Of Digital Circuits Lab Manual EXPERIMENT - 3 1 AIM: To verify universal gates NAND and NOR. 2 TOOLS/APPARATUS: IC 7402, IC 7400, Power supply, Connecting wires, Multimeter, Breadboard etc. 3 STANDARD PROCEDURES: 3.1 Analyzing the Problem: NAND GATE: o NAND is the contraction of AND – NOT gates. o It has two or more inputs and only one output i.e. Y = A · B. o When all the inputs are HIGH, the output is LOW. If any one or both the inputs are LOW, then the output is HIGH. o The Logic symbol and the truth table of NAND gate is as shown here. o The small circle (or bubble) represents the operation of inversion. o The NAND gate is equivalent to an OR gate with the bubble at its inputs which are as shown. Department of Information Technology, Faculty of Technology, D. D. University, Nadiad. 12
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<strong>Design</strong> <strong>Of</strong> <strong>Digital</strong> <strong>Circuits</strong> Lab Manual<br />
EXPERIMENT - 3<br />
1 AIM: To verify universal gates NAND and NOR.<br />
2 TOOLS/APPARATUS: IC 7402, IC 7400, Power supply, Connecting wires, Multimeter, Breadboard etc.<br />
3 STANDARD PROCEDURES:<br />
3.1 Analyzing the Problem:<br />
NAND GATE:<br />
o NAND is the contraction of AND – NOT gates.<br />
o It has two or more inputs and only one output i.e. Y = A · B.<br />
o When all the inputs are HIGH, the output is LOW. If any one or both the inputs are LOW, then the<br />
output is HIGH.<br />
o The Logic symbol and the truth table of NAND gate is as shown here.<br />
o The small circle (or bubble) represents the operation of inversion.<br />
o The NAND gate is equivalent to an OR gate with the bubble at its inputs which are as shown.<br />
Department of Information Technology, Faculty of Technology, D. D. <strong>University</strong>, Nadiad.<br />
12