78K0/KF2 8-Bit Single-Chip Microcontrollers UD

More documents

Recommendations

Info

CHAPTER 2 PIN FUNCTIONS (2) Non-port functions (2/2) Function Name I/O Function After Reset Alternate Function TI000 Input External count clock input to 16-bit timer/event counter 00 Capture trigger input to capture registers (CR000, CR010) of 16-bit timer/event counter 00 Input port P00 TI001 External count clock input to 16-bit timer/event counter 01 Capture trigger input to capture registers (CR001, CR011) of 16-bit timer/event counter 01 P05/SSI11 TI010 Input Capture trigger input to capture register (CR000) of 16-bit timer/event counter 00 Input port P01/TO00 TI011 Capture trigger input to capture register (CR001) of 16-bit timer/event counter 01 P06/TO01 TI50 Input External count clock input to 8-bit timer/event counter 50 Input port P17/TO50 TI51 External count clock input to 8-bit timer/event counter 51 P33/TO51/INTP4 TO00 Output 16-bit timer/event counter 00 output Input port P01/TI010 TO01 16-bit timer/event counter 01 output P06/TI011 TO50 Output 8-bit timer/event counter 50 output Input port P17/TI50 TO51 8-bit timer/event counter 51 output P33/TI51/INTP4 TOH0 Output 8-bit timer H0 output Input port P15 TOH1 8-bit timer H1 output P16/INTP5 TxD0 Output Serial data output from UART0 Input port P10/SCK10 TxD6 Output Serial data output from UART6 Input port P13 X1 − Connecting resonator for main system clock Input port P121/OCD0A Note X2 − Input port P122/EXCLK/OCD0B Note EXCLK Input External clock input for main system clock Input port P122/X2/OCD0B Note XT1 − Connecting resonator for subsystem clock Input port P123 XT2 − Input port P124/EXCLKS EXCLKS Input External clock input for subsystem clock Input port P124/XT2 VDD − Positive power supply for P121 to P124 and other than ports − − EVDD − Positive power supply for ports other than P20 to P27 and P121 to P124. Make EVDD the same potential as VDD. AVREF − A/D converter reference voltage input and positive power supply for P20 to P27 and A/D converter − − − − VSS − Ground potential for P121 to P124 and other than ports − − EVSS − Ground potential for ports other than P20 to P27 and P121 to P124. Make EVSS the same potential as VSS. AVSS − A/D converter ground potential. Make the same potential as VSS. − − − − OCD0A Note OCD1A Note Input Connection for on-chip debug mode setting pins (µPD78F0547D only) Input port P121/X1 P31/INTP2 OCD0B Note − P122/X2/EXCLK OCD1B Note P32/INTP3 Note µPD78F0547D only 34 User’s Manual U17397EJ5V0<strong>UD</strong>
CHAPTER 2 PIN FUNCTIONS 2.2 Description of Pin Functions 2.2.1 P00 to P06 (port 0) P00 to P06 function as a 7-bit I/O port. These pins also function as timer I/O, serial interface data I/O, clock I/O, and chip select input. The following operation modes can be specified in 1-bit units. (1) Port mode P00 to P06 function as a 7-bit I/O port. P00 to P06 can be set to input or output port in 1-bit units using port mode register 0 (PM0). Use of an on-chip pull-up resistor can be specified by pull-up resistor option register 0 (PU0). (2) Control mode P00 to P06 function as timer I/O, serial interface data I/O, clock I/O, and chip select input. (a) TI000, TI001 These are the pins for inputting an external count clock to 16-bit timer/event counters 00 and 01 and are also for inputting a capture trigger signal to the capture registers (CR000, CR010 or CR001, CR011) of 16-bit timer/event counters 00 and 01. (b) TI010, TI011 These are the pins for inputting a capture trigger signal to the capture register (CR000 or CR001) of 16-bit timer/event counters 00 and 01. (c) TO00, TO01 These are timer output pins of 16-bit timer/event counters 00 and 01. (d) SI11 This is a serial data input pin of serial interface CSI11. (e) SO11 This is a serial data output pin of serial interface CSI11. (f) SCK11 This is a serial clock I/O pin of serial interface CSI11. (g) SSI11 This is a chip select input pin of serial interface CSI11. User’s Manual U17397EJ5V0<strong>UD</strong> 35
Page 1 and 2: User’s Manual 78K0/KF2 8-Bit Sing
Page 3 and 4: NOTES FOR CMOS DEVICES 1 VOLTAGE AP
Page 5 and 6: Caution: This product uses SuperFla
Page 7 and 8: INTRODUCTION Readers This manual is
Page 9 and 10: Documents Related to Development To
Page 11 and 12: 3.3 Instruction Address Addressing
Page 13 and 14: 8.4 Operations of 8-Bit Timer/Event
Page 15 and 16: 18.2 Configuration of Serial Interf
Page 17 and 18: 27.7.2 Flash memory programming mod
Page 19 and 20: CHAPTER 1 OUTLINE 1.1 Features ◦
Page 21 and 22: CHAPTER 1 OUTLINE 1.3 Ordering Info
Page 23 and 24: CHAPTER 1 OUTLINE Pin Identificatio
Page 25 and 26: CHAPTER 1 OUTLINE The list of fun
Page 27 and 28: CHAPTER 1 OUTLINE 1.6 Block Diagram
Page 29 and 30: CHAPTER 1 OUTLINE Item µPD78F0544
Page 31 and 32: CHAPTER 2 PIN FUNCTIONS 2.1 Pin Fun
Page 33: CHAPTER 2 PIN FUNCTIONS (2) Non-por
Page 37 and 38: CHAPTER 2 PIN FUNCTIONS 2.2.3 P20 t
Page 39 and 40: CHAPTER 2 PIN FUNCTIONS 2.2.8 P70 t
Page 41 and 42: CHAPTER 2 PIN FUNCTIONS (c) BUZ Thi
Page 43 and 44: CHAPTER 2 PIN FUNCTIONS 2.3 Pin I/O
Page 45 and 46: _ + CHAPTER 2 PIN FUNCTIONS Figure
Page 47 and 48: CHAPTER 3 CPU ARCHITECTURE 3.1 Memo
Page 49 and 50: CHAPTER 3 CPU ARCHITECTURE Figure 3
Page 53 and 54: CHAPTER 3 CPU ARCHITECTURE Correspo
Page 55 and 56: CHAPTER 3 CPU ARCHITECTURE 3.1.1 In
Page 57 and 58: CHAPTER 3 CPU ARCHITECTURE 3.1.3 In
Page 63 and 64: CHAPTER 3 CPU ARCHITECTURE (b) Zero
Page 67 and 68: CHAPTER 3 CPU ARCHITECTURE 3.2.3 Sp
Page 69 and 70: CHAPTER 3 CPU ARCHITECTURE Table 3-
Page 71 and 72: CHAPTER 3 CPU ARCHITECTURE Table 3-
Page 73 and 74: CHAPTER 3 CPU ARCHITECTURE 3.3.2 Im
Page 75 and 76: CHAPTER 3 CPU ARCHITECTURE 3.3.4 Re
Page 77 and 78: CHAPTER 3 CPU ARCHITECTURE 3.4.3 Di
Page 79 and 80: CHAPTER 3 CPU ARCHITECTURE 3.4.5 Sp
Page 81 and 82: CHAPTER 3 CPU ARCHITECTURE 3.4.7 Ba
Page 83 and 84: CHAPTER 3 CPU ARCHITECTURE 3.4.9 St
Page 85 and 86:
CHAPTER 4 MEMORY BANK SELECT FUNCTI
Page 87 and 88:
Page 89 and 90:
Page 91 and 92:
Page 93 and 94:
Page 95 and 96:
CHAPTER 5 PORT FUNCTIONS 5.1 Port F
Page 97 and 98:
CHAPTER 5 PORT FUNCTIONS Table 5-2.
Page 99 and 100:
CHAPTER 5 PORT FUNCTIONS Figure 5-3
Page 101 and 102:
Page 103 and 104:
Page 105 and 106:
Page 107 and 108:
CHAPTER 5 PORT FUNCTIONS 5.2.3 Port
Page 109 and 110:
Page 111 and 112:
Page 113 and 114:
Page 115 and 116:
Page 117 and 118:
Page 119 and 120:
Page 121 and 122:
CHAPTER 5 PORT FUNCTIONS 5.2.11 Por
Page 123 and 124:
Page 125 and 126:
CHAPTER 5 PORT FUNCTIONS 5.3 Regist
Page 127 and 128:
CHAPTER 5 PORT FUNCTIONS (2) Port r
Page 129 and 130:
CHAPTER 5 PORT FUNCTIONS (4) A/D po
Page 131 and 132:
CHAPTER 5 PORT FUNCTIONS Table 5-5.
Page 133 and 134:
CHAPTER 5 PORT FUNCTIONS 5.6 Cautio
Page 135 and 136:
CHAPTER 6 CLOCK GENERATOR (3) Inter
Page 137 and 138:
CHAPTER 6 CLOCK GENERATOR Remarks 1
Page 139 and 140:
CHAPTER 6 CLOCK GENERATOR (2) Proce
Page 141 and 142:
CHAPTER 6 CLOCK GENERATOR (4) Inter
Page 143 and 144:
CHAPTER 6 CLOCK GENERATOR (6) Main
Page 145 and 146:
CHAPTER 6 CLOCK GENERATOR (8) Oscil
Page 147 and 148:
CHAPTER 6 CLOCK GENERATOR Caution 1
Page 149 and 150:
CHAPTER 6 CLOCK GENERATOR 6.4.3 Whe
Page 151 and 152:
CHAPTER 6 CLOCK GENERATOR Figure 6-
Page 153 and 154:
CHAPTER 6 CLOCK GENERATOR Note When
Page 155 and 156:
CHAPTER 6 CLOCK GENERATOR Cautions
Page 157 and 158:
CHAPTER 6 CLOCK GENERATOR (b) To st
Page 159 and 160:
CHAPTER 6 CLOCK GENERATOR (b) To st
Page 161 and 162:
CHAPTER 6 CLOCK GENERATOR 6.6.4 Exa
Page 163 and 164:
CHAPTER 6 CLOCK GENERATOR Table 6-5
Page 165 and 166:
Page 167 and 168:
CHAPTER 6 CLOCK GENERATOR 6.6.7 Con
Page 169 and 170:
Page 171 and 172:
CHAPTER 7 16-BIT TIMER/EVENT COUNTE
Page 173 and 174:
Page 175 and 176:
Page 177 and 178:
Page 179 and 180:
Page 181 and 182:
Page 183 and 184:
Page 185 and 186:
Page 187 and 188:
Page 189 and 190:
Page 191 and 192:
Page 193 and 194:
Page 195 and 196:
Page 197 and 198:
Page 199 and 200:
Page 201 and 202:
Page 203 and 204:
Page 205 and 206:
Page 207 and 208:
Page 209 and 210:
Page 211 and 212:
Page 213 and 214:
Page 215 and 216:
Page 217 and 218:
Page 219 and 220:
Page 221 and 222:
Page 223 and 224:
Page 225 and 226:
Page 227 and 228:
Page 229 and 230:
Page 231 and 232:
Page 233 and 234:
Page 235 and 236:
Page 237 and 238:
Page 239 and 240:
Page 241 and 242:
Page 243 and 244:
Page 245 and 246:
CHAPTER 8 8-BIT TIMER/EVENT COUNTER
Page 247 and 248:
Page 249 and 250:
Page 251 and 252:
Page 253 and 254:
Page 255 and 256:
Page 257 and 258:
Page 259 and 260:
Page 261 and 262:
CHAPTER 9 8-BIT TIMERS H0 AND H1 9.
Page 263 and 264:
Figure 9-2. Block Diagram of 8-Bit
Page 265 and 266:
Page 267 and 268:
CHAPTER 9 8-BIT TIMERS H0 AND H1 N
Page 269 and 270:
CHAPTER 9 8-BIT TIMERS H0 AND H1 C
Page 271 and 272:
Page 273 and 274:
CHAPTER 9 8-BIT TIMERS H0 AND H1 Fi
Page 275 and 276:
CHAPTER 9 8-BIT TIMERS H0 AND H1 B
Page 277 and 278:
Page 279 and 280:
Page 281 and 282:
CHAPTER 9 8-BIT TIMERS H0 AND H1 To
Page 283 and 284:
CHAPTER 9 8-BIT TIMERS H0 AND H1 B
Page 285 and 286:
CHAPTER 9 8-BIT TIMERS H0 AND H1 8-
Page 287 and 288:
CHAPTER 10 WATCH TIMER 10.1 Functio
Page 289 and 290:
CHAPTER 10 WATCH TIMER 10.3 Registe
Page 291 and 292:
CHAPTER 10 WATCH TIMER 10.4 Watch T
Page 293 and 294:
CHAPTER 11 WATCHDOG TIMER 11.1 Func
Page 295 and 296:
CHAPTER 11 WATCHDOG TIMER 11.3 Regi
Page 297 and 298:
CHAPTER 11 WATCHDOG TIMER Cautions
Page 299 and 300:
CHAPTER 11 WATCHDOG TIMER Remark If
Page 301 and 302:
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTP
Page 303 and 304:
CHAPTER 12 CLOCK OUTPUT/BUZZER OUTP
Page 305 and 306:
CHAPTER 13 A/D CONVERTER 13.1 Funct
Page 307 and 308:
CHAPTER 13 A/D CONVERTER (7) 8-bit
Page 309 and 310:
CHAPTER 13 A/D CONVERTER Figure 13
Page 311 and 312:
CHAPTER 13 A/D CONVERTER Figure 13-
Page 313 and 314:
CHAPTER 13 A/D CONVERTER (4) Analog
Page 315 and 316:
CHAPTER 13 A/D CONVERTER (6) Port m
Page 317 and 318:
CHAPTER 13 A/D CONVERTER Figure 13-
Page 319 and 320:
CHAPTER 13 A/D CONVERTER 13.4.3 A/D
Page 321 and 322:
CHAPTER 13 A/D CONVERTER 13.5 How t
Page 323 and 324:
CHAPTER 13 A/D CONVERTER 13.6 Cauti
Page 325 and 326:
CHAPTER 13 A/D CONVERTER (8) Interr
Page 327 and 328:
CHAPTER 14 SERIAL INTERFACE UART0 1
Page 329 and 330:
Figure 14-1. Block Diagram of Seria
Page 331 and 332:
Page 333 and 334:
CHAPTER 14 SERIAL INTERFACE UART0 (
Page 335 and 336:
CHAPTER 14 SERIAL INTERFACE UART0
Page 337 and 338:
Page 339 and 340:
Page 341 and 342:
Page 343 and 344:
Page 345 and 346:
CHAPTER 14 SERIAL INTERFACE UART0 E
Page 347 and 348:
CHAPTER 14 SERIAL INTERFACE UART0 k
Page 349 and 350:
CHAPTER 15 SERIAL INTERFACE UART6 R
Page 351 and 352:
CHAPTER 15 SERIAL INTERFACE UART6 F
Page 353 and 354:
Page 355 and 356:
Page 357 and 358:
Page 359 and 360:
Page 361 and 362:
Page 363 and 364:
Page 365 and 366:
Page 367 and 368:
Page 369 and 370:
Page 371 and 372:
Page 373 and 374:
Page 375 and 376:
Page 377 and 378:
Page 379 and 380:
Page 381 and 382:
Page 383 and 384:
CHAPTER 15 SERIAL INTERFACE UART6 k
Page 385 and 386:
CHAPTER 16 SERIAL INTERFACES CSI10
Page 387 and 388:
Page 389 and 390:
Page 391 and 392:
Page 393 and 394:
Page 395 and 396:
Page 397 and 398:
Page 399 and 400:
Page 401 and 402:
Page 403 and 404:
Page 405 and 406:
Page 407 and 408:
CHAPTER 17 SERIAL INTERFACE CSIA0 1
Page 409 and 410:
Page 411 and 412:
CHAPTER 17 SERIAL INTERFACE CSIA0 (
Page 413 and 414:
CHAPTER 17 SERIAL INTERFACE CSIA0 F
Page 415 and 416:
Page 417 and 418:
Page 419 and 420:
Page 421 and 422:
CHAPTER 17 SERIAL INTERFACE CSIA0 T
Page 423 and 424:
Page 425 and 426:
Page 427 and 428:
Page 429 and 430:
Page 431 and 432:
CHAPTER 17 SERIAL INTERFACE CSIA0 I
Page 433 and 434:
Page 435 and 436:
Page 437 and 438:
Page 439 and 440:
Page 441 and 442:
Page 443 and 444:
Page 445 and 446:
CHAPTER 18 SERIAL INTERFACE IIC0 18
Page 447 and 448:
CHAPTER 18 SERIAL INTERFACE IIC0 Fi
Page 449 and 450:
CHAPTER 18 SERIAL INTERFACE IIC0 (3
Page 451 and 452:
Page 453 and 454:
Page 455 and 456:
Page 457 and 458:
Page 459 and 460:
Page 461 and 462:
Page 463 and 464:
Page 465 and 466:
Page 467 and 468:
Page 469 and 470:
Page 471 and 472:
Page 473 and 474:
Page 475 and 476:
CHAPTER 18 SERIAL INTERFACE IIC0 Ta
Page 477 and 478:
Page 479 and 480:
CHAPTER 18 SERIAL INTERFACE IIC0 Ta
Page 481 and 482:
Page 483 and 484:
Page 485 and 486:
Page 487 and 488:
CHAPTER 18 SERIAL INTERFACE IIC0 An
Page 489 and 490:
Page 491 and 492:
CHAPTER 18 SERIAL INTERFACE IIC0 (c
Page 493 and 494:
CHAPTER 18 SERIAL INTERFACE IIC0 (b
Page 495 and 496:
CHAPTER 18 SERIAL INTERFACE IIC0 (d
Page 497 and 498:
Page 499 and 500:
CHAPTER 18 SERIAL INTERFACE IIC0 (d
Page 501 and 502:
CHAPTER 18 SERIAL INTERFACE IIC0 (i
Page 503 and 504:
Page 505 and 506:
CHAPTER 18 SERIAL INTERFACE IIC0 (i
Page 507 and 508:
CHAPTER 18 SERIAL INTERFACE IIC0 (g
Page 509 and 510:
Page 511 and 512:
Page 513 and 514:
Page 515 and 516:
Page 517 and 518:
Figure 19-1. Block Diagram of Multi
Page 519 and 520:
CHAPTER 19 MULTIPLIER/DIVIDER The f
Page 521 and 522:
CHAPTER 19 MULTIPLIER/DIVIDER 19.4
Page 523 and 524:
CHAPTER 19 MULTIPLIER/DIVIDER 19.4.
Page 525 and 526:
CHAPTER 20 INTERRUPT FUNCTIONS 20.1
Page 527 and 528:
CHAPTER 20 INTERRUPT FUNCTIONS Tabl
Page 529 and 530:
CHAPTER 20 INTERRUPT FUNCTIONS Figu
Page 531 and 532:
CHAPTER 20 INTERRUPT FUNCTIONS Tabl
Page 533 and 534:
CHAPTER 20 INTERRUPT FUNCTIONS Caut
Page 535 and 536:
CHAPTER 20 INTERRUPT FUNCTIONS (3)
Page 537 and 538:
CHAPTER 20 INTERRUPT FUNCTIONS (5)
Page 539 and 540:
Page 541 and 542:
CHAPTER 20 INTERRUPT FUNCTIONS 20.4
Page 543 and 544:
Page 545 and 546:
CHAPTER 21 KEY INTERRUPT FUNCTION 2
Page 547 and 548:
CHAPTER 22 STANDBY FUNCTION 22.1 St
Page 549 and 550:
CHAPTER 22 STANDBY FUNCTION (2) Osc
Page 551 and 552:
CHAPTER 22 STANDBY FUNCTION Table 2
Page 553 and 554:
CHAPTER 22 STANDBY FUNCTION (2) HAL
Page 555 and 556:
CHAPTER 22 STANDBY FUNCTION Table 2
Page 557 and 558:
CHAPTER 22 STANDBY FUNCTION Caution
Page 559 and 560:
CHAPTER 22 STANDBY FUNCTION Figure
Page 561 and 562:
CHAPTER 23 RESET FUNCTION The follo
Page 563 and 564:
CHAPTER 23 RESET FUNCTION Figure 23
Page 565 and 566:
CHAPTER 23 RESET FUNCTION Table 23-
Page 567 and 568:
CHAPTER 23 RESET FUNCTION 8-bit tim
Page 569 and 570:
CHAPTER 23 RESET FUNCTION 23.1 Regi
Page 571 and 572:
CHAPTER 24 POWER-ON-CLEAR CIRCUIT 2
Page 573 and 574:
CHAPTER 24 POWER-ON-CLEAR CIRCUIT F
Page 575 and 576:
CHAPTER 24 POWER-ON-CLEAR CIRCUIT F
Page 577 and 578:
CHAPTER 25 LOW-VOLTAGE DETECTOR 25.
Page 579 and 580:
CHAPTER 25 LOW-VOLTAGE DETECTOR (2
Page 581 and 582:
Page 583 and 584:
CHAPTER 25 LOW-VOLTAGE DETECTOR Fig
Page 585 and 586:
Page 587 and 588:
Page 589 and 590:
CHAPTER 25 LOW-VOLTAGE DETECTOR (2)
Page 591 and 592:
Page 593 and 594:
CHAPTER 25 LOW-VOLTAGE DETECTOR Fi
Page 595 and 596:
CHAPTER 26 OPTION BYTE (3) 0084H/10
Page 597 and 598:
CHAPTER 26 OPTION BYTE Figure 26-1.
Page 599 and 600:
CHAPTER 27 FLASH MEMORY The 78K0/KF
Page 601 and 602:
CHAPTER 27 FLASH MEMORY 27.3 Writin
Page 603 and 604:
CHAPTER 27 FLASH MEMORY Figure 27-4
Page 605 and 606:
Axxxx Bxxxxx Cxxxxxx STATVE CHAPTER
Page 607 and 608:
CHAPTER 27 FLASH MEMORY (1) Signal
Page 609 and 610:
CHAPTER 27 FLASH MEMORY 27.6.6 Othe
Page 611 and 612:
CHAPTER 27 FLASH MEMORY 27.7.3 Sele
Page 613 and 614:
CHAPTER 27 FLASH MEMORY 27.8 Securi
Page 615 and 616:
CHAPTER 27 FLASH MEMORY 27.9 Proces
Page 617 and 618:
CHAPTER 27 FLASH MEMORY The followi
Page 619 and 620:
CHAPTER 27 FLASH MEMORY Table 27-1
Page 621 and 622:
CHAPTER 27 FLASH MEMORY Table 27-1
Page 623 and 624:
CHAPTER 27 FLASH MEMORY 27.10.1 Boo
Page 625 and 626:
CHAPTER 28 ON-CHIP DEBUG FUNCTION (
Page 627 and 628:
CHAPTER 28 ON-CHIP DEBUG FUNCTION (
Page 629 and 630:
CHAPTER 29 INSTRUCTION SET 29.1.2 D
Page 631 and 632:
CHAPTER 29 INSTRUCTION SET Instruct
Page 633 and 634:
Page 635 and 636:
Page 637 and 638:
Page 639 and 640:
CHAPTER 29 INSTRUCTION SET (2) 16-b
Page 641 and 642:
CHAPTER 30 ELECTRICAL SPECIFICATION
Page 643 and 644:
Page 645 and 646:
Page 647 and 648:
Page 649 and 650:
Page 651 and 652:
Page 653 and 654:
Page 655 and 656:
Page 657 and 658:
Page 659 and 660:
Page 661 and 662:
Page 663 and 664:
Page 665 and 666:
Page 667 and 668:
Page 669 and 670:
Page 671 and 672:
Page 673 and 674:
Page 675 and 676:
Page 677 and 678:
Page 679 and 680:
Page 681 and 682:
Page 683 and 684:
Page 685 and 686:
Page 687 and 688:
Page 689 and 690:
Page 691 and 692:
Page 693 and 694:
Page 695 and 696:
Page 697 and 698:
Page 699 and 700:
Page 701 and 702:
Page 703 and 704:
Page 705 and 706:
POC Circuit Timing CHAPTER 32 ELECT
Page 707 and 708:
Page 709 and 710:
Page 711 and 712:
Page 713 and 714:
Page 715 and 716:
Page 717 and 718:
Page 719 and 720:
Page 721 and 722:
Page 723 and 724:
Page 725 and 726:
Page 727 and 728:
Page 729 and 730:
CHAPTER 34 PACKAGE DRAWINGS • µ
Page 731 and 732:
CHAPTER 34 PACKAGE DRAWINGS • µ
Page 733 and 734:
CHAPTER 35 RECOMMENDED SOLDERING CO
Page 735 and 736:
CHAPTER 36 CAUTIONS FOR WAIT 36.2 P
Page 737 and 738:
APPENDIX A DEVELOPMENT TOOLS The fo
Page 739 and 740:
APPENDIX A DEVELOPMENT TOOLS Figure
Page 741 and 742:
APPENDIX A DEVELOPMENT TOOLS A.1 So
Page 743 and 744:
APPENDIX A DEVELOPMENT TOOLS A.4 Fl
Page 745 and 746:
APPENDIX A DEVELOPMENT TOOLS A.5.2
Page 747 and 748:
APPENDIX B NOTES ON TARGET SYSTEM D
Page 749 and 750:
APPENDIX C REGISTER INDEX C.1 Regis
Page 751 and 752:
APPENDIX C REGISTER INDEX Port mode
Page 753 and 754:
APPENDIX C REGISTER INDEX C.2 Regis
Page 755 and 756:
APPENDIX C REGISTER INDEX P3: Port
Page 757 and 758:
APPENDIX D LIST OF CAUTIONS This ap
Page 759 and 760:
APPENDIX D LIST OF CAUTIONS (3/26)
Page 761 and 762:
Page 763 and 764:
Page 765 and 766:
Page 767 and 768:
Page 769 and 770:
APPENDIX D LIST OF CAUTIONS Chapter
Page 771 and 772:
Page 773 and 774:
Page 775 and 776:
Page 777 and 778:
Page 779 and 780:
Page 781 and 782:
Page 783 and 784:
APPENDIX E REVISION HISTORY E.1 Maj
Page 785 and 786:
APPENDIX E REVISION HISTORY Page De
Page 787 and 788:
APPENDIX E REVISION HISTORY Page De
Page 789 and 790:
APPENDIX E REVISION HISTORY Edition
Page 791 and 792:
APPENDIX E REVISION HISTORY (4/14)
Page 793 and 794:
Page 795 and 796:
Page 797 and 798:
Page 799 and 800:
Page 801 and 802:
show all

78K0/KF2 8-Bit Single-Chip Microcontrollers UD

Create successful ePaper yourself

Delete template?

Save as template?