xmega a3u - Elfa
xmega a3u - Elfa
xmega a3u - Elfa
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XMEGA A3U<br />
36.6 ADC characteristics<br />
Table 36-8. Power supply, reference and input range.<br />
Symbol Parameter Condition Min. Typ. Max. Units<br />
AV CC Analog supply voltage V CC - 0.3 V CC + 0.3<br />
V REF Reference voltage 1 AV CC - 0.6<br />
V<br />
R in Input resistance Switched 4.0 kΩ<br />
C sample Input capacitance Switched 4.4 pF<br />
R AREF Reference input resistance (leakage only) >10 MΩ<br />
C AREF Reference input capacitance Static load 7 pF<br />
V IN Input range -0.1 AV CC +0.1<br />
Conversion range Differential mode, Vinp - Vinn -V REF V REF V<br />
V IN Conversion range Single ended unsigned mode, Vinp -ΔV V REF -ΔV<br />
ΔV Fixed offset voltage 190 LSB<br />
Table 36-9.<br />
Clock and timing.<br />
Symbol Parameter Condition Min. Typ. Max. Units<br />
Clk ADC<br />
f ADC<br />
ADC Clock frequency<br />
Sample rate<br />
Maximum is 1/4 of Peripheral clock<br />
frequency<br />
100 2000<br />
Measuring internal signals 100 125<br />
Current limitation (CURRLIMIT) off 100 2000<br />
CURRLIMIT = LOW 100 1500<br />
CURRLIMIT = MEDIUM 100 1000<br />
CURRLIMIT = HIGH 100 500<br />
Sampling Time 1/2 Clk ADC cycle 0.25 5 µs<br />
Conversion time (latency)<br />
(RES+2)/2+(GAIN !=0)<br />
RES (Resolution) = 8 or 12<br />
5 8<br />
Start-up time ADC clock cycles 12 24<br />
ADC settling time<br />
After changing reference or input mode 7 7<br />
After ADC flush 1 1<br />
kHz<br />
ksps<br />
Clk ADC<br />
cycles<br />
Clk ADC<br />
cycles<br />
Table 36-10. Accuracy characteristics.<br />
Symbol Parameter Condition (2) Min. Typ. Max. Units<br />
RES Resolution Programmable to 8 or 12 bit 8 12 12 Bits<br />
INL (1)<br />
V CC -1.0V < V REF < V CC -0.6V ±1.2 ±2<br />
500ksps<br />
All V REF ±1.5 ±3<br />
Integral non-linearity<br />
V CC -1.0V < V REF < V CC -0.6V ±1.0 ±2 lsb<br />
2000ksps<br />
All V REF ±1.5 ±3<br />
DNL (1) Differential non-linearity guaranteed monotonic