- Page 1 and 2: Features • High-performance, low-
- Page 3 and 4: XMEGA A3U 2. Pinout/Block Diagram F
- Page 5 and 6: XMEGA A3U 3.1 Block Diagram All Atm
- Page 7 and 8: XMEGA A3U 6. AVR CPU 6.1 Features
- Page 9 and 10: XMEGA A3U 6.4.1 Hardware Multiplier
- Page 11 and 12: XMEGA A3U 7. Memories 7.1 Features
- Page 13 and 14: XMEGA A3U 7.3.4 Production Signatur
- Page 15 and 16: XMEGA A3U The I/O memory address fo
- Page 17 and 18: XMEGA A3U 8. DMAC - Direct Memory A
- Page 19 and 20: XMEGA A3U Figure 9-1. Event system
- Page 21 and 22: XMEGA A3U Figure 10-1. The clock sy
- Page 23 and 24: XMEGA A3U 11. Power Management and
- Page 25 and 26: XMEGA A3U 12. System Control and Re
- Page 27 and 28: XMEGA A3U 13. WDT - Watchdog Timer
- Page 29 and 30: XMEGA A3U Table 14-1. Reset and int
- Page 31: XMEGA A3U 15.3 Output Driver All po
- Page 35 and 36: XMEGA A3U A timer/counter can be cl
- Page 37 and 38: XMEGA A3U 18. AWeX - Advanced Wavef
- Page 39 and 40: XMEGA A3U 20. RTC - 16-bit Real-Tim
- Page 41 and 42: XMEGA A3U the configuration of thes
- Page 43 and 44: XMEGA A3U It is possible to disable
- Page 45 and 46: XMEGA A3U 24. USART 24.1 Features
- Page 47 and 48: XMEGA A3U 25. IRCOM - IR Communicat
- Page 49 and 50: XMEGA A3U 27. CRC - Cyclic Redundan
- Page 51 and 52: XMEGA A3U Both internal and externa
- Page 53 and 54: XMEGA A3U The DAC has high drive st
- Page 55 and 56: XMEGA A3U Figure 30-1. Analog compa
- Page 57 and 58: XMEGA A3U 32. Pinout and Pin Functi
- Page 59 and 60: XMEGA A3U 32.2 Alternate Pin Functi
- Page 61 and 62: XMEGA A3U Table 32-6. Port F - alte
- Page 63 and 64: XMEGA A3U Base address Name Descrip
- Page 65 and 66: XMEGA A3U Mnemonics Operands Descri
- Page 67 and 68: XMEGA A3U Mnemonics Operands Descri
- Page 69 and 70: XMEGA A3U 35.2 64M2 D Marked Pin# 1
- Page 71 and 72: XMEGA A3U Table 36-3. Operating vol
- Page 73 and 74: XMEGA A3U Table 36-5. Current consu
- Page 75 and 76: XMEGA A3U 36.5 I/O Pin Characterist
- Page 77 and 78: XMEGA A3U Table 36-10. Accuracy cha
- Page 79 and 80: XMEGA A3U Table 36-14. Gain error A
- Page 81 and 82: XMEGA A3U 36.13 Flash and EEPROM Me
- Page 83 and 84:
XMEGA A3U 36.14.6 External clock ch
- Page 85 and 86:
XMEGA A3U 36.14.7 External 16MHz cr
- Page 87 and 88:
XMEGA A3U 36.14.8 External 32.768kH
- Page 89 and 90:
XMEGA A3U Table 36-31. SPI timing c
- Page 91 and 92:
XMEGA A3U Table 36-32. t HD;STA t L
- Page 93 and 94:
XMEGA A3U Figure 37-3. Active mode
- Page 95 and 96:
XMEGA A3U Figure 37-7. Active mode
- Page 97 and 98:
XMEGA A3U Figure 37-11. Idle mode s
- Page 99 and 100:
XMEGA A3U 37.1.3 Power-down mode su
- Page 101 and 102:
XMEGA A3U Figure 37-19. Standby sup
- Page 103 and 104:
XMEGA A3U 37.2.2 Output Voltage vs.
- Page 105 and 106:
XMEGA A3U Figure 37-27. I/O pin out
- Page 107 and 108:
XMEGA A3U 37.2.3 Thresholds and Hys
- Page 109 and 110:
XMEGA A3U 37.3 ADC Characteristics
- Page 111 and 112:
XMEGA A3U Figure 37-39. DNL error v
- Page 113 and 114:
XMEGA A3U Figure 37-43. Offset erro
- Page 115 and 116:
XMEGA A3U Figure 37-47. Noise vs. V
- Page 117 and 118:
XMEGA A3U 37.5 Analog Comparator Ch
- Page 119 and 120:
XMEGA A3U Figure 37-55. Analog comp
- Page 121 and 122:
XMEGA A3U 37.7 BOD Characteristics
- Page 123 and 124:
XMEGA A3U Figure 37-63. Reset pin p
- Page 125 and 126:
XMEGA A3U 37.9 Power-on Reset Chara
- Page 127 and 128:
XMEGA A3U Figure 37-70. 32.768kHz i
- Page 129 and 130:
XMEGA A3U 37.10.4 32MHz Internal Os
- Page 131 and 132:
XMEGA A3U 37.10.5 32MHz internal os
- Page 133 and 134:
XMEGA A3U Figure 37-82. SDA hold ti
- Page 135 and 136:
XMEGA A3U 39. Datasheet Revision Hi
- Page 137 and 138:
8.1 Features ......................
- Page 139 and 140:
27.1 Features .....................
- Page 141:
Atmel Corporation 2325 Orchard Park