xmega a3u - Elfa
xmega a3u - Elfa
xmega a3u - Elfa
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XMEGA A3U<br />
Figure 10-1.<br />
The clock system, clock sources and clock distribution.<br />
Real Time<br />
Counter<br />
Peripherals RAM AVR CPU<br />
Non-Volatile<br />
Memory<br />
clk PER<br />
clk PER2<br />
clk CPU<br />
clk PER4<br />
USB<br />
Brown-out<br />
Detector<br />
Watchdog<br />
Timer<br />
RTCSRC<br />
clk RTC<br />
System Clock Prescalers<br />
clk SYS<br />
System Clock Multiplexer<br />
(SCLKSEL)<br />
Prescaler<br />
USBSRC<br />
clk USB<br />
DIV32<br />
DIV32<br />
DIV32<br />
PLL<br />
PLLSRC<br />
XOSCSEL<br />
DIV4<br />
32kHz<br />
Int. ULP<br />
32.768kHz<br />
Int. OSC<br />
32.768kHz<br />
TOSC<br />
0.4 – 16MHz<br />
XTAL<br />
32MHz<br />
Int. Osc<br />
2MHz<br />
Int. Osc<br />
XTAL2<br />
XTAL1<br />
TOSC2<br />
TOSC1<br />
10.3 Clock Sources<br />
The clock sources are divided in two main groups: internal oscillators and external clock<br />
sources. Most of the clock sources can be directly enabled and disabled from software, while<br />
others are automatically enabled or disabled, depending on peripheral settings. After reset, the<br />
device starts up running from the 2MHz internal oscillator. The other clock sources, DFLLs and<br />
PLL, are turned off by default.<br />
The internal oscillators do not require any external components to run. For details on characteristics<br />
and accuracy of the internal oscillators, refer to the device datasheet.<br />
8386B–AVR–12/11<br />
21
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