LT1057/LT1058 Dual and Quad, JFET Input ... - SP-Elektroniikka

LT1057/LT1058 

Dual and Quad, JFET Input 

Precision High Speed Op Amps 

FEATURES 

■ 14V/µs Slew Rate: 10V/µs Min 

■ 5MHz Gain-Bandwidth Product 

■ Fast Settling Time: 1.3µs to 0.02% 

■ 150µV Offset Voltage (LT1057): 450µV Max 

■ 180µV Offset Voltage (LT1058): 600µV Max 

■ 2µV/°C V OS Drift: 7µV/°C Max 

■ 50pA Bias Current at 70°C 

■ Low Voltage Noise: 

13nV/√Hz at 1kHz 

26nV/√Hz at 10Hz 

APPLICATIO S 

U 

■ 

■ 

■ 

■ 

■ 

■ 

■ 

Precision, High Speed Instrumentation 

Fast, Precision Sample-and-Hold 

Logarithmic Amplifiers 

D/A Output Amplifiers 

Photodiode Amplifiers 

Voltage-to-Frequency Converters 

Frequency-to-Voltage Converters 

DESCRIPTIO 

U 

The LT ® 1057 is a matched JFET input dual op amp in the 

industry standard 8-pin configuration, featuring a 

combination of outstanding high speed and precision 

specifications. It replaces all the popular bipolar and JFET 

input dual op amps. In particular, the LT1057 upgrades the 

performance of systems using the LF412A and OP-215 

JFET input duals. 

The LT1058 is the lowest offset quad JFET input 

operational amplifier in the standard 14-pin configuration. 

It offers significant accuracy improvement over presently 

available JFET input quad operational amplifiers. The 

LT1058 can replace four single precision JFET input op 

amps, while saving board space, power dissipation and 

cost. 

Both the LT1057 and LT1058 are available in the plastic 

PDIP package and the surface mount SO package. 

, LTC and LT are registered trademarks of Linear Technology Corporation. 

TYPICAL APPLICATIO 

U 

Current Output, High Speed, High Input Impedance 

Instrumentation Amplifier 

Distribution of Offset Voltage 

(All Packages, LT1057 and LT1058) 

3 

V2 

2 

13 

12 

V1 

+ 

1/4 

LT1058 

– 

– 

1/4 


+ 

1 

14 

7.5k 

4.7k 7.5k 

6 

– 

R 

1/4 7 

X 

9.1k LT1058 

5 

500Ω* 

4.7k 

7.5k 

+ 

6.8k 

1k** 

8 

1/4 


I OUT = 

2(V1 – V2) 

R X 

+ 

– 

10 

9 

I OUT 

PERCENT OF UNITS 

25 

20 

15 

10 

5 

0 

–1.0 

V S = ±15V 

T A = 25°C 

LT1057: 610 OP AMPS 

LT1058: 520 OP AMPS 

1130 OP AMPS 

TESTED 

–0.6 –0.2 0 0.2 0.6 1.0 

INPUT OFFSET VOLTAGE (mV) 

LT1057/1058 • TA02 

*GAIN ADJUST 

**COMMON MODE REJECTION ADJUST 

BANDWIDTH ≈ 2MHz 

LT1057/1058 • TA01 

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1

+ 

– 


ABSOLUTE AXI U RATI GS 

W W W 

Supply Voltage ...................................................... ± 20V 

Differential Input Voltage ....................................... ± 40V 

Input Voltage ......................................................... ± 20V 

Output Short-Circuit Duration .......................... Indefinite 

Storage Temperature Range ................. – 65°C to 150°C 

Lead Temperature (Soldering, 10 sec).................. 300°C 

U 

(Note 1) 

Operating Temperature Range 

LT1057AM/LT1057M/ 

LT1058AM/LT1058M (OBSOLETE)...– 55°C to 125°C 

LT1057AC/LT1057C/LT1057S 

LT1058AC/LT1058C/LT1058S ................ 0°C to 70°C 

LT1057I ...................................... –40°C ≤ T A ≤ 85°C 

U U W 

PACKAGE/ORDER I FOR ATIO 

NC 

NC 

OUT A 

–IN A 

+IN A 

V – 

NC 

NC 

1 

2 

3 

4 

5 

6 

7 

8 

OUTPUT A 

–IN A 

+IN A 

V + 

+IN B 

–IN B 

OUTPUT B 

– A 

+ 

TOP VIEW 

SW PACKAGE 

16-LEAD PLASTIC (WIDE) SO 

T JMAX = 150°C, θ JA = 90°C/W 

ORDER PART 

NUMBER 

1 

2 

3 

4 

5 

6 

7 

– A 

+ 

+ 

B – 

B 

LT1057SW 

LT1057ISW 

TOP VIEW 

16 NC 

15 NC 

14 V + 

13 OUT B 

12 –IN B 

11 +IN B 

10 NC 

9 NC 

D 

14 

13 

12 

11 

10 

9 

8 

N14 PACKAGE 

14-LEAD PDIP 

T JMAX = 110°C, θ JA = 130°C/W 

J14 PACKAGE 14-LEAD CERDIP 

T JMAX = 150°C, θ JA = 100°C/W 

C 

+ 

– 

– 

+ 

OUT A 

–IN A 

+IN A 

V + 

+IN B 

–IN B 

OUT B 

NC 

OUTPUT D 

–IN D 

+IN D 

V – 

+IN C 

–IN C 

OUTPUT C 

1 

2 

3 

4 

5 

6 

7 

8 

TOP VIEW 

– A 

+ 

+ 

B – 

D 

SW PACKAGE 

16-LEAD PLASTIC (WIDE) SO 

T JMAX =150°C, θ JA =90°C/W 

C 

ORDER PART 

NUMBER 

LT1058SW 

LT1058ISW 

ORDER PART 

NUMBER 

LT1058ACN 

LT1058CN 

LT1058AMJ 

LT1058MJ 

LT1058ACJ 

LT1058CJ 

+ 

– 

– 

+ 

16 OUT D 

15 –IN D 

14 +IN D 

13 V – 

12 +IN C 

11 –IN C 

10 OUT C 

9 NC 

+IN A 

V – 

+IN B 

–IN B 

TOP VIEW 

V + 

8 

OUTPUT A 1 7 OUTPUT B 

–IN A 

1 

2 

3 

4 

2 

+IN A 

A 

– + 

3 5 

4 

V – (CASE) 

+IN B 

–IN B 

H PACKAGE 8-LEAD METAL CAN 

OBSOLETE PACKAGE 

Consider the N8 or S8 Package for Alternate Source 

ORDER PART 

NUMBER 

LT1057ACN8 

LT1057CN8 

TOP VIEW 

+ 

B 

– 

8 

7 

6 

5 

S8 PACKAGE 

8-LEAD PLASTIC SO 

T JMAX = 150°C, θ JA = 200°C/W 

6 

–IN A 

OUT A 

V + 

OUT B 

Please note that the LT1057S8/LT1057IS8 standard surface mount pinout 

differs from that of the LT1057 standard CERDIP/PDIP packages. 

LT1057ACJ8 

LT1057CJ8 

LT1057AMJ8 

LT1057MJ8 

OBSOLETE PACKAGES 

Consider the N8, S8 or N14 Package for Alternate Source 

Consult LTC Marketing for parts specified with wider operating temperature ranges. 

ORDER PART 

NUMBER 

LT1057S8 

LT1057IS8 

S8 PART MARKING 

TOP VIEW 

1057 

1057I 

ORDER PART 

NUMBER 

LT1057AMH 

LT1057MH 

LT1057ACH 

LT1057CH 

OUTPUT 1 

8 V + 

–IN A 2 – 7 OUTPUT B 

A 

+ 

+IN A 3 

6 – IN B 

V – B 

4 

5 + IN B 

N8 PACKAGE 

8-LEAD PDIP 

T JMAX = 100°C, θ JA = 130°C/W 

J8 PACKAGE 8-LEAD CERDIP 

T JMAX = 150°C, θ JA = 100°C/W 

+ 

– 

2 

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ELECTRICAL CHARACTERISTICS 

V S = ± 15V, T A = 25°C, V CM = 0V unless otherwise noted. (Note 2) 

LT1057AM/LT1058AM LT1057M/LT1058M 

LT1057AC/LT1058AC LT1057C/LT1058C 

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS 

V OS Input Offset Voltage LT1057 150 450 200 800 µV 

LT1057 (S8 Package) 220 1200 µV 

LT1058 180 600 250 1000 µV 

l OS Input Offset Current Fully Warmed Up 3 40 4 50 pA 

l B Input Bias Current Fully Warmed Up ± 5 ± 50 ± 7 ± 75 pA 

Input Resistance Differential 10 12 10 12 Ω 

Common Mode V CM = – 11V to 8V 10 12 10 12 Ω 

Common Mode V CM = 8V to 11V 10 11 10 11 Ω 

Input Capacitance 4 4 pF 

e n Input Noise Voltage 0.1Hz to 10Hz, LT1057 2.0 2.1 µV P-P 

LT1058 2.4 2.5 µV P-P 

e n Input Noise Voltage Density f O = 10Hz 26 28 nV/√Hz 

f O = 1kHz (Note 3) 13 22 14 24 nV/√Hz 

i n Input Noise Current Density f O = 10Hz, 1kHz (Note 4) 1.5 4 1.8 6 fA/√Hz 

A VOL Large-Signal Voltage Gain V O = ±10V, R L = 2k 150 350 100 300 V/mV 

V O = ±10V, R L = 1k 120 250 80 220 V/mV 

Input Voltage Range ±10.5 14.3 ±10.5 14.3 V 

– 11.5 – 11.5 V 

CMRR Common Mode Rejection Ratio LT1057 86 100 82 98 dB 

LT1058 84 98 80 96 dB 

PSRR Power Supply Rejection Ratio V S = ±10V to ±18V 88 103 86 102 dB 

V OUT Output Voltage Swing R L = 2k ±12 ±13 ±12 ±13 V 

SR Slew Rate 10 14 8 13 V/µs 

GBW Gain-Bandwidth Product f = 1MHz (Note 6) 3.5 5 3 5 MHz 

I S Supply Current Per Amplifier 1.6 2.5 1.7 2.8 mA 

Channel Separation DC to 5kHz, V IN = ±10V 132 130 dB 

(LT1057/LT1058 SW Package Only), V S = ± 15V, T A = 25°C, V CM = 0V unless otherwise noted. 

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 

V OS Input Offset Voltage LT1057 0.3 2 mV 

LT1058 0.35 2.5 

l OS Input Offset Current Fully Warmed Up 5 50 pA 

l B Input Bias Current Fully Warmed Up ±10 ±100 pA 

Input Resistance –Differential 0.4 TΩ 

–Common-Mode V CM = – 11V to 8V 0.4 

V CM = 8V to 11V 0.05 

Input Capacitance 4 pF 

e n Input Noise Voltage 0.1Hz to 10Hz LT1057 2.1 µV P-P 

LT1058 2.5 

e n Input Noise Voltage Density f O = 10Hz 26 nV/√Hz 

f O = 1kHz 13 

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(LT1057/LT1058 SW Package Only), V S = ± 15V, T A = 25°C, V CM = 0V unless otherwise noted. 


i n Input Noise Current Density f O = 10Hz, 1kHz 1.8 fA/√Hz 

A VOL Large-Signal Voltage Gain V O = ±10V R L = 2k 100 300 V/mV 

R L = 1k 50 220 

Input Voltage Range ±10.5 14.3 V 

– 11.5 

CMRR Common-Mode Rejection Ratio V CM = ±15V LT1057 82 98 dB 

LT1058 80 98 

PSRR Power Supply Rejection Ratio V S = ±10V to ±18V 86 102 dB 

V OUT Output Voltage Swing R L = 2k ±12 ±13 V 

SR Slew Rate 8 13 V/µs 

GBW Gain-Bandwidth Product f = 1MHz (Note 6) 3 5 MHz 

I S Supply Current Per Amplifier 1.7 2.8 mA 

Channel Seperation DC to 5kHz, V IN =±10V 130 dB 

The ● denotes the specifications which apply over the temperature range of 0°C ≤ T A ≤ 70°C or -40°C ≤ T A ≤ 85°C (LT1057IS8), 

otherwise specifications are T A = 25°C. V S = ±15V, V CM = 0V, unless noted. 

LT1057AC 

LT1057C 

LT1058AC 

LT1058C 


V OS Input Offset Voltage LT1057 ● 250 800 330 1400 µV 

LT1057IS8 ● 500 2300 µV 

LT1057S8 ● 400 1900 µV 

LT1058 ● 300 1200 400 1800 µV 

Average Temperature LT1057 H/J8 Package ● 1.8 7 2.3 12 µV/°C 

Coefficient of Input N8 Package ● 3 10 4 16 µV/°C 

(Offset Voltage) LT1057S8 (Note 5) ● 4 16 µV/°C 

LT1057IS8 (Note 5) ● 4.5 16 µV/°C 

LT1058 J Package (Note 5) ● 2.5 10 3 15 µV/°C 

N Package (Note 5) ● 4 15 5 22 µV/°C 

I OS lnput Offset Current Warmed Up, T A = 70°C 18 150 20 250 pA 

LT1057IS8 ● 35 600 

I B Input Bias Current Warmed Up, T A = 70°C ± 50 ± 250 ± 60 ± 350 pA 

LT1057IS8 ● ± 100 ± 900 

A VOL Large-Signal Voltage Gain V O = ± 10V, R L = 2k ● 70 220 50 200 V/mV 

CMRR Common Mode Rejection Ratio V CM = ± 10.4V ● 85 98 80 96 dB 

PSRR Power Supply Rejection Ratio V S = ± 10V to ± 18V ● 87 102 84 100 dB 

V OUT Output Voltage Swing R L = 2k ● ±12 ±12.8 ±12 ±12.8 V 

I S Supply Current Per Amplifier ● 2.8 3.2 mA 

T A = 70°C 1.4 1.5 mA 

4 

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(LT1057/LT1058 SW Package Only.) The ● denotes specifications which 

apply over the temperature range of V S = ± 15V, V CM = 0V, 0°C ≤ T A ≤ 70°C (LT1057SW, LT1058SW) or –40°C ≤ T A ≤ 85°C 

(LT1057ISW, LT1058ISW), unless otherwise noted. 


V OS Input Offset Voltage LT1057 ● 0.5 2.5 mV 

LT1058S ● 0.6 3.0 

LT1058IS ● 0.7 4.0 

Average Temperature Coefficient of ● 5 µV/°C 

Input Offset Voltage 

l OS Input Offset Current Warmed Up, T A = 70°C 20 250 pA 

Warmed Up, T A = 85°C 35 400 

l B Input Bias Current Warmed Up, T A = 70°C ± 60 ± 400 pA 

Warmed Up, T A = 85°C ± 100 ± 700 

A VOL Large Signal Volage Gain V O = ± 10V, R L = 2k LT1057 ● 50 200 mV 

LT1058 ● 40 200 

CMRR Common-Mode Rejection Ratio V CM = ± 10.5V LT1057 ● 80 96 dB 


PSRR Power Supply Rejection Ratio V S = ± 10V to ± 18V LT1057 ● 84 100 dB 


V OUT Output Voltage Swing R L = 2k ● ± 12 ± 12.8 V 

The ● denotes specifications which apply over the temperature range of – 55°C ≤ T A ≤ 125°C, V S = ±15V, V CM = 0V, 

unless otherwise noted. 

LT1057AM 

LT1057M 

LT1058AM 

LT1058M 


V OS lnput Offset Voltage LT1057 ● 300 1100 400 2000 µV 

LT1058 ● 380 1600 550 2500 µV 

Average Temperature Coefficient LT1057 ● 2.0 7 2.5 12 µV/°C 

of Input Offset Voltage LT1058 (Note 5) ● 2.5 10 3 15 µV/°C 

I OS lnput Offset Current Warmed Up, T A = 125°C 0.15 2 0.2 3 nA 

I B Input Bias Current Warmed Up, T A = 125°C ± 0.6 ± 4.5 ± 0.7 ± 6 nA 

A VOL Large-Signal Voltage Gain V O = ± 10V, R L = 2k ● 40 120 30 110 V/mV 

CMRR Common Mode Rejection Ratio V CM = ± 10.4V ● 84 97 80 95 dB 

PSRR Power Supply Rejection Ratio V S = ± 10V to ± 17V ● 86 100 83 98 dB 

V OUT Output Voltage Swing R L = 2k ● ± 12 ± 12.7 ± 12 ± 12.6 V 

I S Supply Current Per Amplifier T A = 125°C 1.25 1.9 1.3 2.2 mA 

Note 1: Absolute Maximum Ratings are those values beyond which the life 

of a device may be impaired. 

Note 2: Typical parameters are defined as the 60% yield of distributions of 

individual amplifiers; (i.e., out of 100 LT1058s or, 100 LT1057s, typically 

240 op amps, or 120 for the LT1057, will be better than the indicated 

specification). 

Note 3: This parameter is tested on a sample basis only. 

Note 4: Current noise is calculated from the formula: 

i n = (2ql b ) 1/2 

where q = 1.6 • 10 – 19 coulomb. The noise of source resistors up 

to1G swamps the contribution of current noise. 

Note 5: This parameter is not 100% tested. 

Note 6: Gain-bandwidth product is not tested. It is guaranteed by 

design and by inference from the slew rate measurement. 

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TYPICAL PERFOR A CE CHARACTERISTICS 

INPUT BIAS AND OFFSET CURRENT (pA) 

1000 

300 

100 

30 

10 

3 

0 

Input Bias and Offset Currents 

vs Temperature 

V S = ±15V 

V CM = 0V 

WARMED UP 

BIAS CURRENT 

UW 

OFFSET CURRENT 

25 50 75 100 125 

AMBIENT TEMPERATURE (°C) 

INPUT BIAS CURRENT, T A = 125°C (nA) 

1.6 

1.4 

1.2 

1.0 

0.8 

0.6 

0.4 

0.2 

0 

–0.2 

–15 

Input Bias Current Over 

the Common-Mode Range 

V S = ±15V 

T A = 125°C 

T A = 70°C 

T A = 25°C 

160 

140 

120 

100 

80 

60 

40 

20 

–20 

–10 –5 0 5 10 15 

COMMON MODE INPUT VOLTAGE (V) 

0 

INPUT BIAS CURRENT, T A = 25°C TO 70°C (pA) 

CHANGE IN OFFSET VOLTAGE (µV) 

100 

80 

60 

40 

20 

0 

0 

Warm-Up Drift 

V S = ± 15V 

T A = 25°C 

LT1058 N PACKAGE 

LT1057 N, LT1058 J PACKAGE 

LT1057 H PACKAGE 

LT1057 J PACKAGE 

1 2 3 4 5 

TIME AFTER POWER ON (MINUTES) 

LT1057/1058 • TPC01 



NUMBER OF UNITS 

120 

100 

80 

60 

Distribution of Offset Voltage Drift 

with Temperature 

(H and J Package) 

V S = ±15V 

70 

112 

LT1057H: 102 OP AMPS 

LT1057J: 130 OP AMPS 

LT1058J: 136 OP AMPS 

368 OP AMPS 

96 

40 

32 

24 

20 

16 

2 4 5 

4 

2 1 

0 

–12 –9 –6 –3 0 3 6 9 12 

OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) 


NUMBER OF UNITS 

120 

100 

80 

60 

Distribution of Offset Voltage Drift 

with Temperature 

(Plastic N Package) 

V S = ±15V 

70 

60 

LT1057N: 180 OP AMPS 

LT1058N: 176 OP AMPS 

356 OP AMPS 

44 

40 

31 

27 

22 

20 

9 

11 

4 

5 3 

0 

–12 –9 –6 –3 0 3 6 9 12 

OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C) 

65 

1 UNIT EACH AT 

–19, –16, –13 

14, 16µV/°C 


OFFSET VOLTAGE CHANGE (µV) 

50 

40 

30 

20 

10 

0 

–10 

–20 

–30 

–40 

–50 

0 

Long-Term Drift of 

Representative Units 

V S = ±15V 

T A = 25°C 

1 2 3 4 5 

TIME (MONTHS) 


RMS VOLTAGE NOISE DENSITY (nV/√Hz) 

1000 

6 

70 

50 

30 

20 

Voltage Noise vs Frequency 

V S = ±15V 

T A = 25°C 

1/f CORNER = 28Hz 

10 

3 10 30 100 300 1000 3000 10000 

FREQUENCY (Hz) 


NOISE VOLTAGE (1µV/DIV) 

0.1Hz to 10Hz Noise 

0 

V S = ±15V 

T A = 25°C 

2 4 6 8 10 

TIME (SECONDS) 


VOLTAGE GAIN (V/mV) 

1000 

300 

100 

30 

Voltage Gain vs Temperature 

R L = 2k 

R L = 1k 

V S = ±15V 

V 0 = ±10V 

10 

–75 –25 25 75 125 

TEMPERATURE (°C) 


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UW 

5V/DIV 

Large-Signal Response 

A V = +1 

C L = 100pF 

0.5µs/DIV 

SLEW RATE (V/µs) 

30 

20 

10 

Slew Rate, Gain-Bandwidth 

Product vs Temperature 

0 

–50 

SLEW FALL 

GBW 

SLEW RISE 

V S = ±15V 

–25 0 25 50 75 100 125 


10 

8 

6 

4 

2 

GAIN BANDWIDTH PRODUCT (MHz) 

PEAK-TO-PEAK OUTPUT SWING (V) 

30 

24 

18 

12 

6 

Undistorted Output Swing vs 

Frequency 

0 

100k 

1M 


V S = ±15V 

T A = 25°C 

10M 



Small-Signal Response 

Gain, Phase Shift vs Frequency 

Capacitive Load Handling 

140 

120 

100 

80 

70 

V S = ±15V 

T A = 25°C 

20mV/DIV 

A V = +1 

C L = 100pF 

0.2µs/DIV 

GAIN (dB) 

100 

80 

60 

40 

PHASE MARGIN = 58° 

GAIN 

20 

160 

V S = ±15V 

0 T A = 25°C 

C L = 10pF 

–20 

180 

1 10 100 1k 10k 100k 1M 10M 100M 


PHASE 

120 

140 

PHASE SHIFT (DEGREES) 

OVERSHOOT (%) 

60 

50 

40 

30 

20 

10 

0 

10 

A V = –1 

A V = +1 

A V = 10 

100 1000 10000 

CAPACITIVE LOAD (pF) 



OUTPUT VOLTAGE SWING FROM 0V (V) 

10 

5 

0 

–5 

–10 

0 

Settling Time 

10mV 

10mV 

0.5mV 

0.5mV 

FROM LEFT TO RIGHT: 

SETTLING TIME TO 10mV, 5mV, 2mV, 

1mV, 0.5mV 

1 2 

SETTLING TIME (µs) 

V S = ±15V 

T A = 25°C 

3 


CHANNEL SEPARATION (dB) 

160 

140 

120 

100 

80 

60 

1 

Channel Separation vs Frequency 

LIMITED BY 

THERMAL 

INTERACTION 

AT DC = 132dB 

R S = 1k 

LIMITED BY 

PIN-TO-PIN 

CAPACITANCE 

V S = ±15V 

T A = 25°C 

V IN = 20V P-P TO 5kHz 

R L = 2k 

10 100 1k 10k 


R S = 10Ω 

100k 


1M 

OUTPUT IMPEDANCE (Ω) 

100 

10 

1 

0.1 

1k 

Output Impedance vs Frequency 

V S = ±15V 

T A = 25°C 

A V = 100 

A V = 10 

A V = 1 

10k 100k 10M 



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UW 

CMRR (dB) 

120 

100 

80 

60 

40 

20 

Common Mode Rejection Ratio 

vs Frequency 

0 

10 

100 1k 10k 100k 


V S = ±15V 

T A = 25°C 

1M 


10M 

COMMON MODE RANGE (V) 

15 

14 

13 

12 

11 

±10 

–11 

–12 

–13 

Common Mode Range 


–14 

V S = ±15V 

–15 

–50 0 50 


100 


CMRR, PSRR (dB) 

120 

110 

100 

90 

Common Mode and Power Supply 

Rejections vs Temperature 

V S = ±10V TO ±17V FOR PSRR 

V S = ±15V, V CM = ±10.5V FOR CMRR 

PSRR 

CMRR 

–25 25 75 125 



POWER SUPPLY REJECTION RATIO (dB) 

140 

120 

100 

80 

60 

40 

20 

Power Supply Rejection Ratio 

vs Frequency 

T A = 25°C 

NEGATIVE 

SUPPLY 

POSITIVE 

SUPPLY 

SUPPLY CURRENT PER AMPLIFIER (mA) 

3 

2 

1 

Supply Current 


V S = ±10V 

V S = ±15V 

SHORT-CIRCUIT CURRENT (mA) 

50 

40 

30 

20 

10 

0 

–10 

–20 

–30 

–40 

Short-Circuit Current vs Time 

(One Output Shorted to Ground) 

V S = ±15V 

T A = –55°C 

T A = 25°C 

T A = 125°C 

T A = 125°C 

T A = 25°C 

T A = –55°C 

0 

10 

100 1k 10k 100k 1M 10M 


0 

–50 

–25 0 25 50 75 100 125 


–50 

0 1 2 

3 

TIME FROM OUTPUT SHORT TO GROUND (MINUTES) 




APPLICATIO S I FOR ATIO 

The LT1057 may be inserted directly in LF353, LF412, 

LF442, TL072, TL082 and OP-215 sockets. The LT1058 

plugs into LF347, LF444, TL074 and TL084 sockets. Of 

course, all standard dual and quad bipolar op amps can 

also be replaced by these devices. 

High Speed Operation 

When the feedback around the op amp is resistive (R F ) a 

pole will be created with R F , the source resistance and 

capacitance (R S , C S ), and the amplifier input capacitance 

(C IN ≈ 4pF). In low closed loop gain configurations and 

8 

U W U U 

with R S and R F in the kilohm range, this pole can create 

excess phase shift and even oscillation. A small capacitor 

(C F ) in parallel with R F eliminates this problem. With 

R S (C S + C IN ) = R F C F , the effect of the feedback pole is 

completely removed. 

R S 

C S 

– 

+ 

C F 

C IN 

R F 

OUTPUT 

LT1057/LT1058 • AI01 

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APPLICATIO S I FOR ATIO 

Settling time is measured in a test circuit which can 

be found in the LT1055/LT1056 data sheet and in 

Application Note 10. 

Achieving Picoampere/Microvolt Performance 

In order to realize the picoampere/microvolt level accuracy 

of the LT1057/LT1058, proper care must be exercised. For 

example, leakage currents in circuitry external to the op 

amp can significantly degrade performance. High quality 

insulation should be used (e.g., Teflon TM , Kel-F); cleaning 

of all insulating surfaces to remove fluxes and other 

residues will probably be required. Surface coating may be 

necessary to provide a moisture barrier in high humidity 

environments. 

Board leakage can be minimized by encircling the input 

circuitry with a guard ring operated at a potential close to 

that of the inputs; in inverting configurations, the guard 

ring should be tied to ground, in noninverting connections, 

to the inverting input. Guarding both sides of the 

printed circuit board is required. Bulk leakage reduction 

depends on the guard ring width. 

The LT1057/LT1058 have the lowest offset voltage of 

any dual and quad JFET input op amps available today. 

However, the offset voltage and its drift with time and 

temperature are still not as good as on the best bipolar 

amplifiers (because the transconductance of FETs is 

considerably lower than that of bipolar transistors). 

Conversely, this lower transconductance is the main cause 

of the significantly faster speed performance of FET input 

op amps. 

Teflon is a trademark of DuPont. 

U W U U 

Offset voltage also changes somewhat with temperature 

cycling. The AM grades show a typical 40µV hysteresis 

(50µV on the M grades) when cycled over the – 55°C to 

125°C temperature range. Temperature cycling from 0°C 

to 70°C has a negligible (less than 20µV) hysteresis effect. 

The offset voltage and drift performance are also affected 

by packaging. In the plastic N package, the molding 

compound is in direct contact with the chip, exerting 

pressure on the surface. While NPN input transistors are 

largely unaffected by this pressure, JFET device drift is 

degraded. Consequently for best drift performance, as 

shown in the Typical Performance Characteristics distribution 

plots, the J or H packages are recommended. 

In applications where speed and picoampere bias currents 

are not necessary, Linear Technology offers the bipolar 

input, pin compatible LT1013 and LT1014 dual and quad 

op amps. These devices have significantly better DC 

specifications than any JFET input device. 

Phase Reversal Protection 

Most industry standard JFET input single, dual and quad 

op amps (e.g., LF156, LF351, LF353, LF411, LF412, 

OP-15, OP-16, OP-215, TL084) exhibit phase reversal at 

the output when the negative common mode limit at the 

input is exceeded (i.e., below – 12V with ± 15V supplies). 

The photos below show a ± 16V sine wave input (A), the 

response of an LF412A in the unity gain follower mode (B), 

and the response of the LT1057/LT1058 (C). 

The phase reversal of photo (B) can cause lock-up in servo 

systems. The LT1057/LT1058 does not phase-reverse 

due to a unique phase reversal protection circuit. 

(A) ± 16V Sine Wave Input 

(B) LF412A Output 

All Photos 5V/Div Vertical Scale, 50µs/Div Horizontal Scale 

(C) LT1057/LT1058 Output 

10578fa 

9


TYPICAL APPLICATIO S 

U 

Low Noise, Wideband, Gain = 100 Amplifier with High Input Impedance 

4.3k 

470Ω 

– 

1/4 


+ 

2.4k 7.5k 

500Ω 

INPUT 

470Ω 

– 

1/4 


+ 

4.3k 

2.4k 

– 

+ 

1/4 


OUTPUT 

4.3k 2.4k 

470Ω 

– 

1/4 


+ 

–3dB BANDWIDTH = 350kHZ 

GAIN-BANDWIDTH PRODUCT = 35MHz 

WIDEBAND NOISE = 

13nV/√Hz 

= 7.5nV/√Hz REFERRED TO INPUT 

√3 

RMS NOISE DC TO FULL BANDWIDTH = 7µV 

LT1057/1058 • A01 

Wideband, High Input Impedance, Gain = 1000 Amplifier 

4.7k 

1k 

4.7k 

1k 

INPUT 

– 

1/4 


+ 

+ 

– 

1/4 


– 

+ 

1/4 


+ 

– 

1/4 


OUTPUT 

4.7k 

4.7k 

1k 

1k 

–3dB BANDWIDTH = 400kHz 

GAIN-BANDWIDTH PRODUCT = 400MHz 

WIDEBAND NOISE = 13nV/√Hz REFERRED TO INPUT 

100Ω 


Low Distortion, Crystal Stabilized Oscillator 

130Ω 

COMMON MODE 

SUPPRESSION 

– 

1/2 


+ 

15pF 

CRYSTAL 

20kHz 

NT CUT 

100k 

100Ω 

#327 

LAMP 

– 

1/2 


+ 

0.01µF 

OSCILLATOR 

1V RMS OUT 

20kHz 

0.005% 

DISTORTION 


10 

10578fa



U 

Fast, Precision Bridge Amplifier 

– 

+ 

1/2 


330pF 

10k 

10k 

1k 

INPUT 

– 

330pF 

R 

1/2 

LOAD 

LT1057 LT1010 LT1010 

+ 

SLEW RATE = 14V/µs 

OUTPUT CURRENT TO LOAD = 150mA 

LOAD CAPACITANCE: UP TO 1µF 


Analog Divider 

80.6k* 

20k 

1µF 

LTC1043 

B INPUT 7 8 

12 

11 

–5V 

1k 

LT1004 

1.2V 

+ 

1µF 

6 

LTC1043 

2 

5 

0.001 

POLYSTYRENE 

– 

+ 

5V 

1/2 


–5V 

OUTPUT = 

A 

B 

13 14 

1µF 

16 

A INPUT 

75k* 

– 

+ 

1/2 


30pF 

22k 

330k 

* 1% FILM 

2N2907 

–5V 

1µF 


10578fa 

11



U 

1k 

LTC1043 

–5V 

6 2 

5 

Bipolar Input (AC) V/F Converter 

LT1004 

2.5V 

0.1µF 

16 

INPUT 

±1V 

36.5k* 

10k 

18 3 15 

0.01 

POLYSTYRENE 

– 

+ 

5V 

1/4 


–5V 

1µF 

2N3906 

1M* 

1M* 

+ 

– 

1/4 


1M* 1M* 

10k 

10k 

– 

+ 

22k 

1/4 


150pF 

DATA 

OUTPUT 

0kHz TO 1kHz 

– 

+ 

1/4 


SIGN 

BIT 

0.1µF 

*1% FILM 

MATCH 1M RESISTORS TO 0.05% 


12-Bit A/D Converter 

10k 

INTEGRATOR 

FLIP-FLOP 

15V 

0.001µF 

– 

+ 

1/4 


CLOCK 

10k 

2k 

B OUT 

E IN 

100k* 

0.01µF 

– 

+ 

–15V 

5V 

1/4 


6.8k 

–5V 

10k 

180pF 

2N3906 

2 

14 

5 

1 

74C74 

6 

68pF 

4 

7 

3 

10k 

15V 

10k 

10k 

10k 

+ 

1/4 


– 

OUTPUT 

GATE 

A OUT 

4 16 

LTC1043 

CURRENT 

SWITCH 

15 

18 

–15V 

820Ω LEVEL 

SHIFT 

17 3 

–15V 

2N4393 

A 

DATA OUTPUT = OUT 

B OUT 

*VISHAY S-102 RESISTOR 95k* 

1/4 


10k 

+ 

– 

OUT 

LT1021 IN 

10V 

GND 

1k 

NC 

–15V 


12 

10578fa



U 

Instrumentation Amplifier with Shield Driver 

3 

2 

+ 

1/4 


– 

1 

1k 

R F 

9.1k 

10k 

INPUT 

+ 

– 

GUARD 

GUARD 

8 

1/4 


+ 

– 

10 

9 

R G 

1k 

R G 

1k 

5 

6 

+ 

– 

15V 

4 

1/4 


11 

–15V 

7 

OUTPUT 

13 

12 

– 

1/4 


+ 

14 

R F 

9.1k 

1k 

10k 

GAIN = 10(1+R F /R G ) ≈ 100 

I B = 5pA 

R IN = 10 12 Ω 

BW = 350kHz 


100dB Range Logarithmic Photodiode Amplifier 

15V 

LT1021-10V 

IN 

750k* 

500pF 

50k* 

– 

1/2 

I LT1057 

P 

+ 

– 

OUT 

10k* 

10k* 

6 Q4 

5 

4 

2k 

2k 

– 

LM301A 

+ 

11 

0.033µF 

Q5 

10 

12 

3k 

2 

+ 

1M 

1M 

FULL-SCALE 

TRIM 

1/2 


1 

3 

Q2 

0.01µF 

50k 

DARK 

TRIM 

E OUT 

33Ω 

15 

14 

Q1 

= HP-5082-4204 PIN PHOTODIODE. 

Q1–Q5 = CA3096. 

CONNECT SUBSTRATE OF CA3096 

ARRAY TO Q4’s EMITTER. 

*1% RESISTOR 

100dB RANGE LOGARITHMIC PHOTODIODE AMPLIFIER 

13 

7 

Q3 

9 

15V 

8 

LIGHT (900µM) 

1MW 

100µW 

10µW 

1µW 

100nW 

10nW 

RESPONSE DATA 

DIODE CURRENT 

350µA 

35µA 

3.5µA 

350nA 

35nA 

3.5nA 

CIRCUIT OUTPUT 

10.0V 

7.85V 

5.70V 

3.55V 

1.40V 

–0.75V 


10578fa 

13


PACKAGE DESCRIPTIO 

U 

H Package 

8-Lead TO-5 Metal Can (.200 Inch PCD) 

(Reference LTC DWG # 05-08-1320) 

45°TYP 

.028 – .034 

(0.711 – 0.864) 

.110 – .160 

(2.794 – 4.064) 

INSULATING 

STANDOFF 

.027 – .045 

(0.686 – 1.143) 

PIN 1 

.200 

(5.080) 

TYP 

SEATING 

PLANE 

.010 – .045* 

(0.254 – 1.143) 

.335 – .370 

(8.509 – 9.398) 

DIA 

.305 – .335 

(7.747 – 8.509) 

.040 

(1.016) 

MAX 

.050 

(1.270) 

MAX 

.165 – .185 

(4.191 – 4.699) 

.016 – .021** 

(0.406 – 0.533) 

GAUGE 

PLANE 

.500 – .750 

(12.700 – 19.050) 

REFERENCE 

PLANE 

* LEAD DIAMETER IS UNCONTROLLED BETWEEN THE REFERENCE PLANE 

AND THE SEATING PLANE 

.016 – .024 

** FOR SOLDER DIP LEAD FINISH, LEAD DIAMETER IS 

(0.406 – 0.610) 

H8(TO-5) 0.200 PCD 0801 

J8 Package 

8-Lead CERDIP (Narrow .300 Inch, Hermetic) 


.300 BSC 

(7.62 BSC) 

CORNER LEADS OPTION 

(4 PLCS) 

.200 

(5.080) 

MAX 

.005 

(0.127) 

MIN 

.405 

(10.287) 

MAX 

8 7 6 5 

.008 – .018 

(0.203 – 0.457) 

0° – 15° 

NOTE: LEAD DIMENSIONS APPLY TO SOLDER 

DIP/PLATE OR TIN PLATE LEADS 

.045 – .068 

(1.143 – 1.650) 

FULL LEAD 

OPTION 

.023 – .045 

(0.584 – 1.143) 

HALF LEAD 

OPTION 

.045 – .065 

(1.143 – 1.651) 

.014 – .026 

(0.360 – 0.660) 

.015 – .060 

(0.381 – 1.524) 

.100 

(2.54) 

BSC 

.125 

3.175 

MIN 

.025 

(0.635) 

RAD TYP 

1 2 3 4 

.220 – .310 

(5.588 – 7.874) 

J8 0801 

J Package 

14-Lead CERDIP (Narrow .300 Inch, Hermetic) 


.300 BSC 

(7.62 BSC) 

.015 – .060 

(0.381 – 1.524) 

.200 

(5.080) 

MAX 

.005 

(0.127) 

MIN 

.785 

(19.939) 

MAX 

14 13 12 11 10 9 8 

.008 – .018 

(0.203 – 0.457) 

NOTE: LEAD DIMENSIONS APPLY 

TO SOLDER DIP/PLATE OR TIN 

PLATE LEADS 

0° – 15° 

.045 – .065 

(1.143 – 1.651) 

.014 – .026 

(0.360 – 0.660) 

.100 

(2.54) 

BSC 

.025 

(0.635) 

.125 

RAD TYP 

(3.175) 

MIN 

J14 0801 

1 2 3 4 5 6 7 

.220 – .310 

(5.588 – 7.874) 

OBSOLETE PACKAGES 

14 

10578fa



U 

N8 Package 

8-Lead PDIP (Narrow .300 Inch) 


.400* 

(10.160) 

MAX 

8 7 6 5 

.255 ± .015* 

(6.477 ± 0.381) 

1 2 3 4 

.300 – .325 

(7.620 – 8.255) 

.045 – .065 

(1.143 – 1.651) 

.130 ± .005 

(3.302 ± 0.127) 

.008 – .015 

(0.203 – 0.381) 

.325 +.035 

–.015 

+0.889 

8.255 

–0.381 

( ) 

.065 

(1.651) 

TYP 

.100 

(2.54) 

BSC 

NOTE: 

INCHES 

1. DIMENSIONS ARE 

MILLIMETERS 

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. 

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 

.120 

(3.048) 

MIN 

.018 ± .003 

(0.457 ± 0.076) 

.020 

(0.508) 

MIN 

N8 1002 

N Package 

14-Lead PDIP (Narrow .300 Inch) 


.770* 

(19.558) 

MAX 

14 

13 

12 

11 

10 

9 

8 

.255 ± .015* 

(6.477 ± 0.381) 

1 2 3 4 5 6 7 

.300 – .325 

(7.620 – 8.255) 

.130 ± .005 

(3.302 ± 0.127) 

.045 – .065 

(1.143 – 1.651) 

.008 – .015 

(0.203 – 0.381) 

.325 +.035 

–.015 

+0.889 

8.255 

–0.381 

( ) 

.020 

(0.508) 

MIN 

.120 

(3.048) 

MIN 

.005 

(0.125) 

MIN 

NOTE: 

INCHES 

1. DIMENSIONS ARE 

MILLIMETERS 

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. 

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm) 

.100 

(2.54) 

BSC 

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. 

However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation 

that the interconnection of its circuits as described herein will not infringe on existing patent rights. 

.065 

(1.651) 

TYP 

.018 ± .003 

(0.457 ± 0.076) 

N14 1002 

10578fa 

15



N 

U 

S8 Package 

8-Lead Plastic Small Outline (Narrow .150 Inch) 


.050 BSC 

.045 ±.005 

.189 – .197 

(4.801 – 5.004) 

NOTE 3 

8 7 6 5 

.245 

MIN 

1 2 3 N/2 

.160 ±.005 

.228 – .244 

(5.791 – 6.197) 

N 

N/2 

.150 – .157 

(3.810 – 3.988) 

NOTE 3 

.030 ±.005 

TYP 

RECOMMENDED SOLDER PAD LAYOUT 

1 

2 3 4 

.008 – .010 

(0.203 – 0.254) 

.010 – .020 

(0.254 – 0.508) × 45° 0°– 8° TYP 

.053 – .069 

(1.346 – 1.752) 

.004 – .010 

(0.101 – 0.254) 

.016 – .050 

.014 – .019 

(0.406 – 1.270) 

(0.355 – 0.483) 

NOTE: 

INCHES 

TYP 

1. DIMENSIONS IN 

(MILLIMETERS) 

2. DRAWING NOT TO SCALE 

3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. 

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 

.050 

(1.270) 

BSC 

SO8 0502 

SW Package 

16-Lead Plastic Small Outline (Wide .300 Inch) 


.030 ±.005 

TYP 

N 

.050 BSC .045 ±.005 

.398 – .413 

(10.109 – 10.490) 

NOTE 4 

16 15 14 13 12 11 10 9 

N 

.420 

MIN 

.325 ±.005 

NOTE 3 

.394 – .419 

(10.007 – 10.643) 

1 2 3 N/2 

N/2 

RECOMMENDED SOLDER PAD LAYOUT 

1 

2 3 4 5 6 7 8 

.005 

(0.127) 

RAD MIN 

.291 – .299 

(7.391 – 7.595) 

NOTE 4 

.010 – .029 

× 45° 

(0.254 – 0.737) 

0° – 8° TYP 

.093 – .104 

(2.362 – 2.642) 

.037 – .045 

(0.940 – 1.143) 

16 

.050 

.009 – .013 

(1.270) 

(0.229 – 0.330) NOTE 3 

BSC 

.014 – .019 

.016 – .050 

(0.356 – 0.482) 

(0.406 – 1.270) 

TYP 

NOTE: 

INCHES 

1. DIMENSIONS IN 

(MILLIMETERS) 

2. DRAWING NOT TO SCALE 

3. PIN 1 IDENT, NOTCH ON TOP AND CAVITIES ON THE BOTTOM OF PACKAGES ARE THE MANUFACTURING OPTIONS. 

THE PART MAY BE SUPPLIED WITH OR WITHOUT ANY OF THE OPTIONS 

4. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. 

MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 

Linear Technology Corporation 

1630 McCarthy Blvd., Milpitas, CA 95035-7417 

(408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com 

.004 – .012 

(0.102 – 0.305) 

S16 (WIDE) 0502 

10578fa 

LW/TP 1102 1K REV A • PRINTED IN USA 

© LINEAR TECHNOLOGY CORPORATION 1989

LT1057/LT1058 Dual and Quad, JFET Input ... - SP-Elektroniikka

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