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AGFA d-lab.3 Digital Compact Lab

AGFA d-lab.3 Digital Compact Lab

AGFA d-lab.3 Digital Compact Lab

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Repair<br />

Printer<br />

Latch<br />

The LUTs are topped by a 16-bit Latch for each<br />

colour. The Latches are used to synchronise and<br />

buffer the asynchronous LUT data with the pixel<br />

clock.<br />

<strong>Digital</strong> Analogue Converter (DAC)<br />

The DAC converts the 12-bit wide image date into<br />

an analogue current between 0 and 20 mA as a<br />

function of its clock. The Printer Mainboard holds a<br />

DAC for each colour whose clock can be controlled<br />

independent of the others (see 4.13. Pixel shift).<br />

Current/Voltage Conversion & 50 Ohm Line Adjustment<br />

The output currents are transformed to analogue<br />

voltages which are amplified by operational<br />

amplifiers and ride on the cables with 50 ohms<br />

(RGB). The voltage amplitude is 0... 600mV.<br />

Level Adjustment & Amplification<br />

The circuit filters out the noise part of the energy of<br />

the green and blue laser channels measured by the<br />

monitor diode and amplifies the total noise<br />

amplitude by a factor 10.<br />

High Speed Analogue-<strong>Digital</strong> Converter (ADC)<br />

The 2-channel ADC converts the amplified noise<br />

signals of the green and blue laser channel to one<br />

Byte each. Digitising is in real time for each colour,<br />

i.e. at every pixel clock. The digital values are<br />

validated in the FPGA for the calculation.<br />

<strong>AGFA</strong> d-<strong>lab.3</strong> 2001-01-02 /PN 9009 6.3.23

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