AGFA d-lab.3 Digital Compact Lab

Repair
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13. Pixel shift
In the Pixel shift module, three independent
clocks are generated for the red, green and
blue DAC. A Software-programmable shift
register exists for each colour. The shift
registers allow the shift of the DAC-Clocks at a
resolution of 1/8 pixel clock, i.e. an adjustment
of the pixel coverage of the three colours is
possible in steps of 1/8 pixels.
14. Red correction
The red correction comprises an 8-bit wide
register that can be loaded by the Software.
The content of the register is calculated in the
calculation module in the same way as the
noise correction of grn/blu. Hence, a fine
adjustment of the red channel by ± 4% is
possible.
15. Service
In the service module, the 32-bit wide pixel data
is divided to the three channels (RGB).
Depending on the selected operation mode and
the status of the Pipeline control, the pixel data
is put on the data pipeline or sent to the µC
data bus by the FIFO or the registers. Three
implemented 10-bit registers, one for each
colour, enable the Software to save any pixel
value for each colour which can be used for the
internal test image generation or the horizontal
image border exposure (see 10. Mode).
16. Status
In the status module, the different Pipeline
conditions are assessed and error messages
are generated. The µC can check the status.
Some of the signals are indicated in addition by
LEDs on the Mainboard.
The following conditions can be checked and
are indicated:
Status Display Data bit LED
FIFO empty FIFO Flag direct D0 none
FIFO almost full FIFO Flag direct D1 D37 yellow
FIFO full FIFO Flag direct D2 none
End Of Line (EOL) Line retrace D3 D33 yellow
Work Image output D4 D34 yellow
Image Error Image data line unequal exposure line D5 D4 red
Facet synch. Facet counter asynchronous D6 D3 red
Laser status Laser enable/disable D7 none
FIFO-Empty-Latch Saved FIFO empty during exposure (Error) D8 D36 yellow
FIFO-Full-Latch Saved FIFO full during exposure (Error) D9 D38 yellow
AGFA d-lab.3 2001-01-02 /PN 9009 6.3.21