AGFA d-lab.3 Digital Compact Lab

Repair
Printer
Owing to the freely programmable limits, there
is a window comparator for each colour whose
window can be shifted within a certain range
and whose window width is variable. From the
counted errors conclusions can be drawn about
the drift direction which can be compensated by
readjusting the laser energy between the
images as well as about the noise amplitude.
7. LUT address multiplexers
The LUT address multiplexers (RGB) send the
pixel data resulting from the calculation (Laser
enable) or the address generator (Laser disable
and µC access) to the LUT addresses in
accordance with the operating mode. For this,
appropriate control signals are generated for
the LUTs (Chipselect, Output enable, Write
enable) and the LUT data multiplexers (Read
enable, Write enable).
8. LUT data multiplexers
The LUT data multiplexers (RGB) control the bidirectional
Input/Output of the FPGA on the
LUT data lines for the reading or writing. When
the µC is writing, the data is sent from the
internal data bus to the LUT data lines of the
corresponding colour. When the µC reads a
LUT, the data of this LUT is switched to the
internal data bus.
9. LUT Switch
The Printer Mainboard holds memories for two
LUT´s for each colour. The Software switchover
between the two LUT´s happens in this
module. Apart from this, the border exposure is
set until the end of an image.
10. Mode
In this module, the various operating modes of
the data pipeline are set. The Software writes a
7-bit date into the mode register. A mode is set
as a function of the Pipeline control and the
date in the mode register.
AGFA d-lab.3 2001-01-02 /PN 9009 6.3.19